[llvm] 349375d - [ConstraintElimination] Generalize OR matching.

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 6 03:56:45 PDT 2022


Author: Florian Hahn
Date: 2022-10-06T11:56:22+01:00
New Revision: 349375d0936e9acd6fead5de03a49b15cdbcd1fd

URL: https://github.com/llvm/llvm-project/commit/349375d0936e9acd6fead5de03a49b15cdbcd1fd
DIFF: https://github.com/llvm/llvm-project/commit/349375d0936e9acd6fead5de03a49b15cdbcd1fd.diff

LOG: [ConstraintElimination] Generalize OR matching.

Extend OR handling to traverse chains of ORs.

Added: 
    

Modified: 
    llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    llvm/test/Transforms/ConstraintElimination/gep-arithmetic.ll
    llvm/test/Transforms/ConstraintElimination/or.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
index 7586e5017d7e..a5513bc4f94d 100644
--- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
@@ -578,18 +578,32 @@ void State::addInfoFor(BasicBlock &BB) {
   if (!Br || !Br->isConditional())
     return;
 
-  // If the condition is an OR of 2 compares and the false successor only has
-  // the current block as predecessor, queue both negated conditions for the
+  // If the condition is a chain of ORs and the false successor only has
+  // the current block as predecessor, queue the negated conditions for the
   // false successor.
   Value *Op0, *Op1;
-  if (match(Br->getCondition(), m_LogicalOr(m_Value(Op0), m_Value(Op1))) &&
-      isa<ICmpInst>(Op0) && isa<ICmpInst>(Op1)) {
+  if (match(Br->getCondition(), m_LogicalOr(m_Value(Op0), m_Value(Op1)))) {
     BasicBlock *FalseSuccessor = Br->getSuccessor(1);
     if (canAddSuccessor(BB, FalseSuccessor)) {
-      WorkList.emplace_back(DT.getNode(FalseSuccessor), cast<ICmpInst>(Op0),
-                            true);
-      WorkList.emplace_back(DT.getNode(FalseSuccessor), cast<ICmpInst>(Op1),
-                            true);
+      SmallVector<Value *> CondWorkList;
+      SmallPtrSet<Value *, 8> SeenCond;
+      auto QueueValue = [&CondWorkList, &SeenCond](Value *V) {
+        if (SeenCond.insert(V).second)
+          CondWorkList.push_back(V);
+      };
+      QueueValue(Op0);
+      QueueValue(Op1);
+      while (!CondWorkList.empty()) {
+        Value *Cur = CondWorkList.pop_back_val();
+        if (auto *Cmp = dyn_cast<ICmpInst>(Cur)) {
+          WorkList.emplace_back(DT.getNode(FalseSuccessor), Cmp, true);
+          continue;
+        }
+        if (match(Cur, m_LogicalOr(m_Value(Op0), m_Value(Op1)))) {
+          QueueValue(Op0);
+          QueueValue(Op1);
+        }
+      }
     }
     return;
   }

diff  --git a/llvm/test/Transforms/ConstraintElimination/gep-arithmetic.ll b/llvm/test/Transforms/ConstraintElimination/gep-arithmetic.ll
index 97537dd96b5f..7a90d5988a35 100644
--- a/llvm/test/Transforms/ConstraintElimination/gep-arithmetic.ll
+++ b/llvm/test/Transforms/ConstraintElimination/gep-arithmetic.ll
@@ -492,7 +492,7 @@ define i4 @ptr_N_signed_positive(i8* %src, i8* %lower, i8* %upper, i16 %N, i16 %
 ; CHECK-NEXT:    [[SRC_STEP:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i16 [[STEP]]
 ; CHECK-NEXT:    [[CMP_STEP_START:%.*]] = icmp ult i8* [[SRC_STEP]], [[LOWER]]
 ; CHECK-NEXT:    [[CMP_STEP_END:%.*]] = icmp uge i8* [[SRC_STEP]], [[UPPER]]
-; CHECK-NEXT:    [[OR_CHECK:%.*]] = or i1 [[CMP_STEP_START]], [[CMP_STEP_END]]
+; CHECK-NEXT:    [[OR_CHECK:%.*]] = or i1 false, false
 ; CHECK-NEXT:    br i1 [[OR_CHECK]], label [[TRAP_BB]], label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret i4 3

diff  --git a/llvm/test/Transforms/ConstraintElimination/or.ll b/llvm/test/Transforms/ConstraintElimination/or.ll
index ee55ec992e22..5a120c921302 100644
--- a/llvm/test/Transforms/ConstraintElimination/or.ll
+++ b/llvm/test/Transforms/ConstraintElimination/or.ll
@@ -145,15 +145,15 @@ define i1 @test_or_chain_ule_1(i4 %x, i4 %y, i4 %z, i4 %a, i4 %b) {
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[F_1:%.*]] = icmp ule i4 [[X]], [[Z]]
 ; CHECK-NEXT:    [[F_2:%.*]] = icmp ule i4 2, [[X]]
-; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 [[F_1]], [[F_2]]
+; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 false, false
 ; CHECK-NEXT:    [[T_1:%.*]] = icmp ugt i4 [[Y]], [[Z]]
-; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], [[T_1]]
+; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], true
 ; CHECK-NEXT:    [[T_2:%.*]] = icmp ugt i4 [[X]], [[Y]]
-; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], [[T_2]]
+; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], true
 ; CHECK-NEXT:    [[T_3:%.*]] = icmp ugt i4 [[X]], [[Z]]
-; CHECK-NEXT:    [[RES_6:%.*]] = xor i1 [[RES_5]], [[T_3]]
+; CHECK-NEXT:    [[RES_6:%.*]] = xor i1 [[RES_5]], true
 ; CHECK-NEXT:    [[T_4:%.*]] = icmp ugt i4 2, [[A]]
-; CHECK-NEXT:    [[RES_7:%.*]] = xor i1 [[RES_6]], [[T_4]]
+; CHECK-NEXT:    [[RES_7:%.*]] = xor i1 [[RES_6]], true
 ; CHECK-NEXT:    [[C_8:%.*]] = icmp ule i4 [[X]], [[A]]
 ; CHECK-NEXT:    [[RES_8:%.*]] = xor i1 [[RES_7]], [[C_8]]
 ; CHECK-NEXT:    [[C_9:%.*]] = icmp ule i4 [[X]], [[B:%.*]]
@@ -226,15 +226,15 @@ define i1 @test_or_chain_ule_2(i4 %x, i4 %y, i4 %z, i4 %a, i4 %b) {
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[F_1:%.*]] = icmp ule i4 [[X]], [[Z]]
 ; CHECK-NEXT:    [[F_2:%.*]] = icmp ule i4 2, [[X]]
-; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 [[F_1]], [[F_2]]
+; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 false, false
 ; CHECK-NEXT:    [[T_1:%.*]] = icmp ugt i4 [[Y]], [[Z]]
-; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], [[T_1]]
+; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], true
 ; CHECK-NEXT:    [[T_2:%.*]] = icmp ugt i4 [[X]], [[Y]]
-; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], [[T_2]]
+; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], true
 ; CHECK-NEXT:    [[T_3:%.*]] = icmp ugt i4 [[X]], [[Z]]
-; CHECK-NEXT:    [[RES_6:%.*]] = xor i1 [[RES_5]], [[T_3]]
+; CHECK-NEXT:    [[RES_6:%.*]] = xor i1 [[RES_5]], true
 ; CHECK-NEXT:    [[T_4:%.*]] = icmp ugt i4 2, [[A]]
-; CHECK-NEXT:    [[RES_7:%.*]] = xor i1 [[RES_6]], [[T_4]]
+; CHECK-NEXT:    [[RES_7:%.*]] = xor i1 [[RES_6]], true
 ; CHECK-NEXT:    [[C_8:%.*]] = icmp ule i4 [[X]], [[A]]
 ; CHECK-NEXT:    [[RES_8:%.*]] = xor i1 [[RES_7]], [[C_8]]
 ; CHECK-NEXT:    [[C_9:%.*]] = icmp ule i4 [[X]], [[B:%.*]]
@@ -308,11 +308,11 @@ define i1 @test_or_chain_with_other_conds_ule(i4 %x, i4 %y, i4 %z, i4 %a, i1 %ar
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[F_1:%.*]] = icmp ule i4 [[X]], [[Z]]
 ; CHECK-NEXT:    [[T_1:%.*]] = icmp ugt i4 [[Y]], [[Z]]
-; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 [[F_1]], [[T_1]]
+; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 false, true
 ; CHECK-NEXT:    [[T_2:%.*]] = icmp ugt i4 [[X]], [[Y]]
-; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], [[T_2]]
+; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], true
 ; CHECK-NEXT:    [[T_3:%.*]] = icmp ugt i4 [[X]], [[Z]]
-; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], [[T_3]]
+; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], true
 ; CHECK-NEXT:    [[C_8:%.*]] = icmp ule i4 [[X]], [[A]]
 ; CHECK-NEXT:    [[RES_6:%.*]] = xor i1 [[RES_5]], [[C_8]]
 ; CHECK-NEXT:    ret i1 [[RES_6]]
@@ -373,11 +373,11 @@ define i1 @test_or_chain_with_and_ule(i4 %x, i4 %y, i4 %z, i4 %a, i4 %b) {
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[F_1:%.*]] = icmp ule i4 [[X]], [[Z]]
 ; CHECK-NEXT:    [[T_1:%.*]] = icmp ugt i4 [[Y]], [[Z]]
-; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 [[F_1]], [[T_1]]
+; CHECK-NEXT:    [[RES_3:%.*]] = xor i1 false, true
 ; CHECK-NEXT:    [[T_2:%.*]] = icmp ugt i4 [[X]], [[Y]]
-; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], [[T_2]]
+; CHECK-NEXT:    [[RES_4:%.*]] = xor i1 [[RES_3]], true
 ; CHECK-NEXT:    [[T_3:%.*]] = icmp ugt i4 [[X]], [[Z]]
-; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], [[T_3]]
+; CHECK-NEXT:    [[RES_5:%.*]] = xor i1 [[RES_4]], true
 ; CHECK-NEXT:    [[C_8:%.*]] = icmp ule i4 [[X]], [[A]]
 ; CHECK-NEXT:    [[RES_6:%.*]] = xor i1 [[RES_5]], [[C_8]]
 ; CHECK-NEXT:    [[C_9:%.*]] = icmp ule i4 [[X]], [[B:%.*]]


        


More information about the llvm-commits mailing list