[PATCH] D135316: [RISCV] Fold selects with -1 in either arm

[Philip Reames via Phabricator via llvm-commits]

reames created this revision.
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We can lower these as an or with the negative of the condition value.  This appears to result in significantly less branch-y code on multiple common idioms (as seen in tests).

Reviewers - I'm assuming the result of a setcc is [0,1] in this patch.  This is correct right?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D135316

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/double-convert.ll
  llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
  llvm/test/CodeGen/RISCV/float-convert.ll
  llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
  llvm/test/CodeGen/RISCV/fpclamptosat.ll
  llvm/test/CodeGen/RISCV/half-convert.ll
  llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
  llvm/test/CodeGen/RISCV/min-max.ll
  llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
  llvm/test/CodeGen/RISCV/rv64zbb.ll
  llvm/test/CodeGen/RISCV/uadd_sat.ll
  llvm/test/CodeGen/RISCV/uadd_sat_plus.ll

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