[PATCH] D131560: AMDGPU: Improve atomicrmw fadd selection

Shilei Tian via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 5 09:17:16 PDT 2022


tianshilei1992 added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:12805
+        // global atomic fadd f32 no-rtn: gfx908, gfx90a, gfx940, gfx11+.
+        if (RMW->use_empty() && Subtarget->hasAtomicFaddNoRtnInsts())
+          return ReportUnsafeHWInst(AtomicExpansionKind::None);
----------------
If I read it correctly, `Subtarget->hasAtomicFaddNoRtnInsts()` is always true here right? Because it is in the block:
```
    if ((AS == AMDGPUAS::GLOBAL_ADDRESS || AS == AMDGPUAS::FLAT_ADDRESS) &&
        Subtarget->hasAtomicFaddNoRtnInsts()) {
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131560/new/

https://reviews.llvm.org/D131560



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