[PATCH] D135233: [VP][RISCV] Add vp.roundtozero and its RISC-V support

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/docs/LangRef.rst:21647
+
+The '``llvm.vp.roundeven``' intrinsic performs floating-point roundeven
+(:ref:`llvm.trunc <int_llvm_trunc>`) of the first vector operand on each enabled lane.  The
----------------
This says roundeven


================
Comment at: llvm/docs/LangRef.rst:21659
+
+      %t = call <4 x float> @llvm.roundtozero.v4f32(<4 x float> %a)
+      %also.r = select <4 x i1> %mask, <4 x float> %t, <4 x float> undef
----------------
this should be llvm.trunc


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:1049
   case ISD::VP_FROUNDEVEN:
+  case ISD::VP_FROUNDTOZERO:
   case ISD::FSIN:
----------------
Put this below FTRUNC since that is the non-VP equivalent.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135233/new/

https://reviews.llvm.org/D135233