[PATCH] D135043: [AArch64] Ensure condition (SUBS) has no uses of value in performCONDCombine
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 4 13:18:45 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcf43154bc375: [AArch64] Ensure condition (SUBS) has no uses of value in performCONDCombine (authored by dmgreen).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D135043/new/
https://reviews.llvm.org/D135043
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/and-mask-removal.ll
Index: llvm/test/CodeGen/AArch64/and-mask-removal.ll
===================================================================
--- llvm/test/CodeGen/AArch64/and-mask-removal.ll
+++ llvm/test/CodeGen/AArch64/and-mask-removal.ll
@@ -486,6 +486,7 @@
; CHECK-SD-LABEL: pr58109:
; CHECK-SD: ; %bb.0:
; CHECK-SD-NEXT: add w8, w0, #1
+; CHECK-SD-NEXT: and w8, w8, #0xff
; CHECK-SD-NEXT: subs w8, w8, #1
; CHECK-SD-NEXT: csel w0, wzr, w8, lo
; CHECK-SD-NEXT: ret
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -18760,7 +18760,7 @@
SDNode *SubsNode = N->getOperand(CmpIndex).getNode();
unsigned CondOpcode = SubsNode->getOpcode();
- if (CondOpcode != AArch64ISD::SUBS)
+ if (CondOpcode != AArch64ISD::SUBS || SubsNode->hasAnyUseOfValue(0))
return SDValue();
// There is a SUBS feeding this condition. Is it fed by a mask we can
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