[PATCH] D135157: [AArch64][GlobalISel] Make vector G_SEXT_INREG legal and allow combining.

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
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As a result of making these legal, and tweaking the combine to allow vectors,
we generate vector G_SEXT_INREG during legalization.

The reason we want to make these legal in the first place is to allow for
more combine opportunities. Once those have been done, we can just lower them
back to shifts in the post-legalizer lowering.

This needs to be one commit otherwise we start causing tests to fail due to
incomplete support for selection etc.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D135157

Files:
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/lib/Target/AArch64/AArch64Combine.td
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
  llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-sextinreg.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir

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