[PATCH] D130953: [X86] [WIP] Eliminate redundant movzbl instruction.
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 4 01:02:00 PDT 2022
LuoYuanke updated this revision to Diff 464907.
LuoYuanke added a comment.
Add pattern to combine copy mask register to gpr
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130953/new/
https://reviews.llvm.org/D130953
Files:
llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/load-scalar-as-vector.ll
llvm/test/CodeGen/X86/pr15267.ll
llvm/test/CodeGen/X86/setcc-lowering.ll
llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
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