[llvm] 54608b4 - [test][Scalarizer] Convert test cases to opaque pointers. NFC
Bjorn Pettersson via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 3 13:39:14 PDT 2022
Author: Bjorn Pettersson
Date: 2022-10-03T22:37:58+02:00
New Revision: 54608b40eb5032e5b476f4eef2c5dc79291d8574
URL: https://github.com/llvm/llvm-project/commit/54608b40eb5032e5b476f4eef2c5dc79291d8574
DIFF: https://github.com/llvm/llvm-project/commit/54608b40eb5032e5b476f4eef2c5dc79291d8574.diff
LOG: [test][Scalarizer] Convert test cases to opaque pointers. NFC
Test cases were converted using the script at
https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34
Added:
Modified:
llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll
llvm/test/Transforms/Scalarizer/basic.ll
llvm/test/Transforms/Scalarizer/constant-extractelement.ll
llvm/test/Transforms/Scalarizer/constant-insertelement.ll
llvm/test/Transforms/Scalarizer/crash-bug.ll
llvm/test/Transforms/Scalarizer/dbg-invariant.ll
llvm/test/Transforms/Scalarizer/dbginfo.ll
llvm/test/Transforms/Scalarizer/global-bug-2.ll
llvm/test/Transforms/Scalarizer/global-bug.ll
llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
llvm/test/Transforms/Scalarizer/scatter-order.ll
llvm/test/Transforms/Scalarizer/store-bug.ll
llvm/test/Transforms/Scalarizer/variable-extractelement.ll
llvm/test/Transforms/Scalarizer/variable-insertelement.ll
llvm/test/Transforms/Scalarizer/vector-of-pointer-to-vector.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll b/llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll
index 7e95ca17d706d..68f132b3a3080 100644
--- a/llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll
+++ b/llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll
@@ -5,7 +5,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
declare <4 x float> @ext(<4 x float>)
@g = global <4 x float> zeroinitializer
-define void @f1(<4 x float> %init, <4 x float> *%base, i32 %count) {
+define void @f1(<4 x float> %init, ptr %base, i32 %count) {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[INIT_I0:%.*]] = extractelement <4 x float> [[INIT:%.*]], i32 0
@@ -20,15 +20,14 @@ define void @f1(<4 x float> %init, <4 x float> *%base, i32 %count) {
; CHECK-NEXT: [[ACC_I2:%.*]] = phi float [ [[INIT_I2]], [[ENTRY]] ], [ [[SEL_I2:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[ACC_I3:%.*]] = phi float [ [[INIT_I3]], [[ENTRY]] ], [ [[SEL_I3:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, <4 x float>* [[BASE:%.*]], i32 [[I]]
-; CHECK-NEXT: [[PTR_I0:%.*]] = bitcast <4 x float>* [[PTR]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[PTR_I0]], align 16
-; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, float* [[PTR_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[PTR_I1]], align 4
-; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, float* [[PTR_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[PTR_I2]], align 8
-; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, float* [[PTR_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[PTR_I3]], align 4
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, ptr [[BASE:%.*]], i32 [[I]]
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[PTR]], align 16
+; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, ptr [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[PTR_I1]], align 4
+; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, ptr [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[PTR_I2]], align 8
+; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, ptr [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[ADD_I0:%.*]] = fadd float [[VAL_I0]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I1:%.*]] = fadd float [[VAL_I1]], [[VAL_I3]]
; CHECK-NEXT: [[ADD_I2:%.*]] = fadd float [[ACC_I0]], [[ACC_I2]]
@@ -50,10 +49,10 @@ define void @f1(<4 x float> %init, <4 x float> *%base, i32 %count) {
; CHECK-NEXT: [[SEL_I1]] = select i1 [[CMP_I1]], float [[CALL_I1]], float 6.000000e+00
; CHECK-NEXT: [[SEL_I2]] = select i1 [[CMP_I2]], float [[CALL_I2]], float 7.000000e+00
; CHECK-NEXT: [[SEL_I3]] = select i1 [[CMP_I3]], float [[CALL_I3]], float 8.000000e+00
-; CHECK-NEXT: store float [[SEL_I0]], float* [[PTR_I0]], align 16
-; CHECK-NEXT: store float [[SEL_I1]], float* [[PTR_I1]], align 4
-; CHECK-NEXT: store float [[SEL_I2]], float* [[PTR_I2]], align 8
-; CHECK-NEXT: store float [[SEL_I3]], float* [[PTR_I3]], align 4
+; CHECK-NEXT: store float [[SEL_I0]], ptr [[PTR]], align 16
+; CHECK-NEXT: store float [[SEL_I1]], ptr [[PTR_I1]], align 4
+; CHECK-NEXT: store float [[SEL_I2]], ptr [[PTR_I2]], align 8
+; CHECK-NEXT: store float [[SEL_I3]], ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0
; CHECK-NEXT: br i1 [[TEST]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
@@ -67,8 +66,8 @@ loop:
%acc = phi <4 x float> [ %init, %entry ], [ %sel, %loop ]
%nexti = sub i32 %i, 1
- %ptr = getelementptr <4 x float>, <4 x float> *%base, i32 %i
- %val = load <4 x float> , <4 x float> *%ptr
+ %ptr = getelementptr <4 x float>, ptr %base, i32 %i
+ %val = load <4 x float> , ptr %ptr
%dval = bitcast <4 x float> %val to <2 x double>
%dacc = bitcast <4 x float> %acc to <2 x double>
%shuffle1 = shufflevector <2 x double> %dval, <2 x double> %dacc,
@@ -83,7 +82,7 @@ loop:
<float 1.0, float 2.0, float 3.0, float 4.0>
%sel = select <4 x i1> %cmp, <4 x float> %call,
<4 x float> <float 5.0, float 6.0, float 7.0, float 8.0>
- store <4 x float> %sel, <4 x float> *%ptr
+ store <4 x float> %sel, ptr %ptr
%test = icmp eq i32 %nexti, 0
br i1 %test, label %loop, label %exit
@@ -92,7 +91,7 @@ exit:
ret void
}
-define void @f2(<4 x i32> %init, <4 x i8> *%base, i32 %count) {
+define void @f2(<4 x i32> %init, ptr %base, i32 %count) {
; CHECK-LABEL: @f2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[INIT_I0:%.*]] = extractelement <4 x i32> [[INIT:%.*]], i32 0
@@ -107,15 +106,14 @@ define void @f2(<4 x i32> %init, <4 x i8> *%base, i32 %count) {
; CHECK-NEXT: [[ACC_I2:%.*]] = phi i32 [ [[INIT_I2]], [[ENTRY]] ], [ [[SEL_I2:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[ACC_I3:%.*]] = phi i32 [ [[INIT_I3]], [[ENTRY]] ], [ [[SEL_I3:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x i8>, <4 x i8>* [[BASE:%.*]], i32 [[I]]
-; CHECK-NEXT: [[PTR_I0:%.*]] = bitcast <4 x i8>* [[PTR]] to i8*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i8, i8* [[PTR_I0]], align 4
-; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr i8, i8* [[PTR_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i8, i8* [[PTR_I1]], align 1
-; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr i8, i8* [[PTR_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i8, i8* [[PTR_I2]], align 2
-; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr i8, i8* [[PTR_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i8, i8* [[PTR_I3]], align 1
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x i8>, ptr [[BASE:%.*]], i32 [[I]]
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i8, ptr [[PTR]], align 4
+; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr i8, ptr [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i8, ptr [[PTR_I1]], align 1
+; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr i8, ptr [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i8, ptr [[PTR_I2]], align 2
+; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr i8, ptr [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i8, ptr [[PTR_I3]], align 1
; CHECK-NEXT: [[EXT_I0:%.*]] = sext i8 [[VAL_I0]] to i32
; CHECK-NEXT: [[EXT_I1:%.*]] = sext i8 [[VAL_I1]] to i32
; CHECK-NEXT: [[EXT_I2:%.*]] = sext i8 [[VAL_I2]] to i32
@@ -136,10 +134,10 @@ define void @f2(<4 x i32> %init, <4 x i8> *%base, i32 %count) {
; CHECK-NEXT: [[TRUNC_I1:%.*]] = trunc i32 [[SEL_I1]] to i8
; CHECK-NEXT: [[TRUNC_I2:%.*]] = trunc i32 [[SEL_I2]] to i8
; CHECK-NEXT: [[TRUNC_I3:%.*]] = trunc i32 [[SEL_I3]] to i8
-; CHECK-NEXT: store i8 [[TRUNC_I0]], i8* [[PTR_I0]], align 4
-; CHECK-NEXT: store i8 [[TRUNC_I1]], i8* [[PTR_I1]], align 1
-; CHECK-NEXT: store i8 [[TRUNC_I2]], i8* [[PTR_I2]], align 2
-; CHECK-NEXT: store i8 [[TRUNC_I3]], i8* [[PTR_I3]], align 1
+; CHECK-NEXT: store i8 [[TRUNC_I0]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i8 [[TRUNC_I1]], ptr [[PTR_I1]], align 1
+; CHECK-NEXT: store i8 [[TRUNC_I2]], ptr [[PTR_I2]], align 2
+; CHECK-NEXT: store i8 [[TRUNC_I3]], ptr [[PTR_I3]], align 1
; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0
; CHECK-NEXT: br i1 [[TEST]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
@@ -153,8 +151,8 @@ loop:
%acc = phi <4 x i32> [ %init, %entry ], [ %sel, %loop ]
%nexti = sub i32 %i, 1
- %ptr = getelementptr <4 x i8>, <4 x i8> *%base, i32 %i
- %val = load <4 x i8> , <4 x i8> *%ptr
+ %ptr = getelementptr <4 x i8>, ptr %base, i32 %i
+ %val = load <4 x i8> , ptr %ptr
%ext = sext <4 x i8> %val to <4 x i32>
%add = add <4 x i32> %ext, %acc
%cmp = icmp slt <4 x i32> %add, <i32 -10, i32 -11, i32 -12, i32 -13>
@@ -163,7 +161,7 @@ loop:
<4 x i32> zeroinitializer
%sel = select <4 x i1> %cmp, <4 x i32> %add, <4 x i32> %limit
%trunc = trunc <4 x i32> %sel to <4 x i8>
- store <4 x i8> %trunc, <4 x i8> *%ptr
+ store <4 x i8> %trunc, ptr %ptr
%test = icmp eq i32 %nexti, 0
br i1 %test, label %loop, label %exit
@@ -173,96 +171,90 @@ exit:
}
; Check that !tbaa information is preserved.
-define void @f3(<4 x i32> *%src, <4 x i32> *%dst) {
+define void @f3(ptr %src, ptr %dst) {
; CHECK-LABEL: @f3(
-; CHECK-NEXT: [[DST_I0:%.*]] = bitcast <4 x i32>* [[DST:%.*]] to i32*
-; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 1
-; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 2
-; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[SRC_I0]], align 16, !tbaa [[TBAA0:![0-9]+]]
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[SRC_I1]], align 4, !tbaa [[TBAA0]]
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[SRC_I2]], align 8, !tbaa [[TBAA0]]
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[SRC_I3]], align 4, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 1
+; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 2
+; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC:%.*]], align 16, !tbaa [[TBAA0:![0-9]+]]
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4, !tbaa [[TBAA0]]
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[DST_I0]], align 16, !tbaa [[TBAA3:![0-9]+]]
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[DST_I1]], align 4, !tbaa [[TBAA3]]
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[DST_I2]], align 8, !tbaa [[TBAA3]]
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[DST_I3]], align 4, !tbaa [[TBAA3]]
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST:%.*]], align 16, !tbaa [[TBAA3:![0-9]+]]
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4, !tbaa [[TBAA3]]
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8, !tbaa [[TBAA3]]
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4, !tbaa [[TBAA3]]
; CHECK-NEXT: ret void
;
- %val = load <4 x i32> , <4 x i32> *%src, !tbaa !1
+ %val = load <4 x i32> , ptr %src, !tbaa !1
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%dst, !tbaa !2
+ store <4 x i32> %add, ptr %dst, !tbaa !2
ret void
}
; Check that !tbaa.struct information is preserved.
-define void @f4(<4 x i32> *%src, <4 x i32> *%dst) {
+define void @f4(ptr %src, ptr %dst) {
; CHECK-LABEL: @f4(
-; CHECK-NEXT: [[DST_I0:%.*]] = bitcast <4 x i32>* [[DST:%.*]] to i32*
-; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 1
-; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 2
-; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[SRC_I0]], align 16, !tbaa.struct !5
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[SRC_I1]], align 4, !tbaa.struct !5
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[SRC_I2]], align 8, !tbaa.struct !5
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[SRC_I3]], align 4, !tbaa.struct !5
+; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 1
+; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 2
+; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC:%.*]], align 16, !tbaa.struct !5
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4, !tbaa.struct !5
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8, !tbaa.struct !5
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4, !tbaa.struct !5
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[DST_I0]], align 16, !tbaa.struct !5
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[DST_I1]], align 4, !tbaa.struct !5
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[DST_I2]], align 8, !tbaa.struct !5
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[DST_I3]], align 4, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST:%.*]], align 16, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4, !tbaa.struct !5
; CHECK-NEXT: ret void
;
- %val = load <4 x i32> , <4 x i32> *%src, !tbaa.struct !5
+ %val = load <4 x i32> , ptr %src, !tbaa.struct !5
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%dst, !tbaa.struct !5
+ store <4 x i32> %add, ptr %dst, !tbaa.struct !5
ret void
}
; Check that llvm.access.group information is preserved.
-define void @f5(i32 %count, <4 x i32> *%src, <4 x i32> *%dst) {
+define void @f5(i32 %count, ptr %src, ptr %dst) {
; CHECK-LABEL: @f5(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[NEXT_INDEX:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[THIS_SRC:%.*]] = getelementptr <4 x i32>, <4 x i32>* [[SRC:%.*]], i32 [[INDEX]]
-; CHECK-NEXT: [[THIS_SRC_I0:%.*]] = bitcast <4 x i32>* [[THIS_SRC]] to i32*
-; CHECK-NEXT: [[THIS_SRC_I1:%.*]] = getelementptr i32, i32* [[THIS_SRC_I0]], i32 1
-; CHECK-NEXT: [[THIS_SRC_I2:%.*]] = getelementptr i32, i32* [[THIS_SRC_I0]], i32 2
-; CHECK-NEXT: [[THIS_SRC_I3:%.*]] = getelementptr i32, i32* [[THIS_SRC_I0]], i32 3
-; CHECK-NEXT: [[THIS_DST:%.*]] = getelementptr <4 x i32>, <4 x i32>* [[DST:%.*]], i32 [[INDEX]]
-; CHECK-NEXT: [[THIS_DST_I0:%.*]] = bitcast <4 x i32>* [[THIS_DST]] to i32*
-; CHECK-NEXT: [[THIS_DST_I1:%.*]] = getelementptr i32, i32* [[THIS_DST_I0]], i32 1
-; CHECK-NEXT: [[THIS_DST_I2:%.*]] = getelementptr i32, i32* [[THIS_DST_I0]], i32 2
-; CHECK-NEXT: [[THIS_DST_I3:%.*]] = getelementptr i32, i32* [[THIS_DST_I0]], i32 3
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[THIS_SRC_I0]], align 16, !llvm.access.group !6
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[THIS_SRC_I1]], align 4, !llvm.access.group !6
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[THIS_SRC_I2]], align 8, !llvm.access.group !6
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[THIS_SRC_I3]], align 4, !llvm.access.group !6
+; CHECK-NEXT: [[THIS_SRC:%.*]] = getelementptr <4 x i32>, ptr [[SRC:%.*]], i32 [[INDEX]]
+; CHECK-NEXT: [[THIS_SRC_I1:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 1
+; CHECK-NEXT: [[THIS_SRC_I2:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 2
+; CHECK-NEXT: [[THIS_SRC_I3:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 3
+; CHECK-NEXT: [[THIS_DST:%.*]] = getelementptr <4 x i32>, ptr [[DST:%.*]], i32 [[INDEX]]
+; CHECK-NEXT: [[THIS_DST_I1:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 1
+; CHECK-NEXT: [[THIS_DST_I2:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 2
+; CHECK-NEXT: [[THIS_DST_I3:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[THIS_SRC]], align 16, !llvm.access.group !6
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[THIS_SRC_I1]], align 4, !llvm.access.group !6
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[THIS_SRC_I2]], align 8, !llvm.access.group !6
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[THIS_SRC_I3]], align 4, !llvm.access.group !6
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[THIS_DST_I0]], align 16, !llvm.access.group !6
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[THIS_DST_I1]], align 4, !llvm.access.group !6
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[THIS_DST_I2]], align 8, !llvm.access.group !6
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[THIS_DST_I3]], align 4, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[THIS_DST]], align 16, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[THIS_DST_I1]], align 4, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[THIS_DST_I2]], align 8, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[THIS_DST_I3]], align 4, !llvm.access.group !6
; CHECK-NEXT: [[NEXT_INDEX]] = add i32 [[INDEX]], -1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[NEXT_INDEX]], [[COUNT:%.*]]
; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[END:%.*]], !llvm.loop [[LOOP7:![0-9]+]]
@@ -274,11 +266,11 @@ entry:
loop:
%index = phi i32 [ 0, %entry ], [ %next_index, %loop ]
- %this_src = getelementptr <4 x i32>, <4 x i32> *%src, i32 %index
- %this_dst = getelementptr <4 x i32>, <4 x i32> *%dst, i32 %index
- %val = load <4 x i32> , <4 x i32> *%this_src, !llvm.access.group !13
+ %this_src = getelementptr <4 x i32>, ptr %src, i32 %index
+ %this_dst = getelementptr <4 x i32>, ptr %dst, i32 %index
+ %val = load <4 x i32> , ptr %this_src, !llvm.access.group !13
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%this_dst, !llvm.access.group !13
+ store <4 x i32> %add, ptr %this_dst, !llvm.access.group !13
%next_index = add i32 %index, -1
%continue = icmp ne i32 %next_index, %count
br i1 %continue, label %loop, label %end, !llvm.loop !3
@@ -310,124 +302,117 @@ define <4 x float> @f6(<4 x float> %x) {
}
; Check that random metadata isn't kept.
-define void @f7(<4 x i32> *%src, <4 x i32> *%dst) {
+define void @f7(ptr %src, ptr %dst) {
; CHECK-LABEL: @f7(
-; CHECK-NEXT: [[DST_I0:%.*]] = bitcast <4 x i32>* [[DST:%.*]] to i32*
-; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 1
-; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 2
-; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[SRC_I0]], align 16
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[SRC_I1]], align 4
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[SRC_I2]], align 8
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[SRC_I3]], align 4
+; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 1
+; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 2
+; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC:%.*]], align 16
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[DST_I0]], align 16
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[DST_I1]], align 4
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[DST_I2]], align 8
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[DST_I3]], align 4
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST:%.*]], align 16
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4
; CHECK-NEXT: ret void
;
- %val = load <4 x i32> , <4 x i32> *%src, !foo !5
+ %val = load <4 x i32> , ptr %src, !foo !5
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%dst, !foo !5
+ store <4 x i32> %add, ptr %dst, !foo !5
ret void
}
; Test GEP with vectors.
-define void @f8(<4 x float *> *%dest, <4 x float *> %ptr0, <4 x i32> %i0,
+define void @f8(ptr %dest, <4 x ptr> %ptr0, <4 x i32> %i0,
; CHECK-LABEL: @f8(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float*>* [[DEST:%.*]] to float**
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 3
-; CHECK-NEXT: [[PTR0_I0:%.*]] = extractelement <4 x float*> [[PTR0:%.*]], i32 0
-; CHECK-NEXT: [[PTR0_I2:%.*]] = extractelement <4 x float*> [[PTR0]], i32 2
-; CHECK-NEXT: [[PTR0_I3:%.*]] = extractelement <4 x float*> [[PTR0]], i32 3
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 3
+; CHECK-NEXT: [[PTR0_I0:%.*]] = extractelement <4 x ptr> [[PTR0:%.*]], i32 0
+; CHECK-NEXT: [[PTR0_I2:%.*]] = extractelement <4 x ptr> [[PTR0]], i32 2
+; CHECK-NEXT: [[PTR0_I3:%.*]] = extractelement <4 x ptr> [[PTR0]], i32 3
; CHECK-NEXT: [[I0_I1:%.*]] = extractelement <4 x i32> [[I0:%.*]], i32 1
; CHECK-NEXT: [[I0_I3:%.*]] = extractelement <4 x i32> [[I0]], i32 3
-; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr float, float* [[PTR0_I0]], i32 100
-; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr float, float* [[OTHER:%.*]], i32 [[I0_I1]]
-; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr float, float* [[PTR0_I2]], i32 100
-; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr float, float* [[PTR0_I3]], i32 [[I0_I3]]
-; CHECK-NEXT: store float* [[VAL_I0]], float** [[DEST_I0]], align 32
-; CHECK-NEXT: store float* [[VAL_I1]], float** [[DEST_I1]], align 8
-; CHECK-NEXT: store float* [[VAL_I2]], float** [[DEST_I2]], align 16
-; CHECK-NEXT: store float* [[VAL_I3]], float** [[DEST_I3]], align 8
+; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr float, ptr [[PTR0_I0]], i32 100
+; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr float, ptr [[OTHER:%.*]], i32 [[I0_I1]]
+; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr float, ptr [[PTR0_I2]], i32 100
+; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr float, ptr [[PTR0_I3]], i32 [[I0_I3]]
+; CHECK-NEXT: store ptr [[VAL_I0]], ptr [[DEST:%.*]], align 32
+; CHECK-NEXT: store ptr [[VAL_I1]], ptr [[DEST_I1]], align 8
+; CHECK-NEXT: store ptr [[VAL_I2]], ptr [[DEST_I2]], align 16
+; CHECK-NEXT: store ptr [[VAL_I3]], ptr [[DEST_I3]], align 8
; CHECK-NEXT: ret void
;
- float *%other) {
+ ptr %other) {
%i1 = insertelement <4 x i32> %i0, i32 100, i32 0
%i2 = insertelement <4 x i32> %i1, i32 100, i32 2
- %ptr1 = insertelement <4 x float *> %ptr0, float *%other, i32 1
- %val = getelementptr float, <4 x float *> %ptr1, <4 x i32> %i2
- store <4 x float *> %val, <4 x float *> *%dest
+ %ptr1 = insertelement <4 x ptr> %ptr0, ptr %other, i32 1
+ %val = getelementptr float, <4 x ptr> %ptr1, <4 x i32> %i2
+ store <4 x ptr> %val, ptr %dest
ret void
}
; Test the handling of unaligned loads.
-define void @f9(<4 x float> *%dest, <4 x float> *%src) {
+define void @f9(ptr %dest, ptr %src) {
; CHECK-LABEL: @f9(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float>* [[DEST:%.*]] to float*
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, float* [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, float* [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, float* [[DEST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x float>* [[SRC:%.*]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[SRC_I0]], align 4
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, float* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[SRC_I1]], align 4
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, float* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[SRC_I2]], align 4
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, float* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[SRC_I3]], align 4
-; CHECK-NEXT: store float [[VAL_I0]], float* [[DEST_I0]], align 8
-; CHECK-NEXT: store float [[VAL_I1]], float* [[DEST_I1]], align 4
-; CHECK-NEXT: store float [[VAL_I2]], float* [[DEST_I2]], align 8
-; CHECK-NEXT: store float [[VAL_I3]], float* [[DEST_I3]], align 4
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[SRC:%.*]], align 4
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[SRC_I1]], align 4
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[SRC_I2]], align 4
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[SRC_I3]], align 4
+; CHECK-NEXT: store float [[VAL_I0]], ptr [[DEST:%.*]], align 8
+; CHECK-NEXT: store float [[VAL_I1]], ptr [[DEST_I1]], align 4
+; CHECK-NEXT: store float [[VAL_I2]], ptr [[DEST_I2]], align 8
+; CHECK-NEXT: store float [[VAL_I3]], ptr [[DEST_I3]], align 4
; CHECK-NEXT: ret void
;
- %val = load <4 x float> , <4 x float> *%src, align 4
- store <4 x float> %val, <4 x float> *%dest, align 8
+ %val = load <4 x float> , ptr %src, align 4
+ store <4 x float> %val, ptr %dest, align 8
ret void
}
; ...and again with subelement alignment.
-define void @f10(<4 x float> *%dest, <4 x float> *%src) {
+define void @f10(ptr %dest, ptr %src) {
; CHECK-LABEL: @f10(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float>* [[DEST:%.*]] to float*
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, float* [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, float* [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, float* [[DEST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x float>* [[SRC:%.*]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[SRC_I0]], align 1
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, float* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[SRC_I1]], align 1
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, float* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[SRC_I2]], align 1
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, float* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[SRC_I3]], align 1
-; CHECK-NEXT: store float [[VAL_I0]], float* [[DEST_I0]], align 2
-; CHECK-NEXT: store float [[VAL_I1]], float* [[DEST_I1]], align 2
-; CHECK-NEXT: store float [[VAL_I2]], float* [[DEST_I2]], align 2
-; CHECK-NEXT: store float [[VAL_I3]], float* [[DEST_I3]], align 2
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[SRC:%.*]], align 1
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[SRC_I1]], align 1
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[SRC_I2]], align 1
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[SRC_I3]], align 1
+; CHECK-NEXT: store float [[VAL_I0]], ptr [[DEST:%.*]], align 2
+; CHECK-NEXT: store float [[VAL_I1]], ptr [[DEST_I1]], align 2
+; CHECK-NEXT: store float [[VAL_I2]], ptr [[DEST_I2]], align 2
+; CHECK-NEXT: store float [[VAL_I3]], ptr [[DEST_I3]], align 2
; CHECK-NEXT: ret void
;
- %val = load <4 x float> , <4 x float> *%src, align 1
- store <4 x float> %val, <4 x float> *%dest, align 2
+ %val = load <4 x float> , ptr %src, align 1
+ store <4 x float> %val, ptr %dest, align 2
ret void
}
; Test that sub-byte loads aren't scalarized.
-define void @f11(<32 x i1> *%dest, <32 x i1> *%src0) {
+define void @f11(ptr %dest, ptr %src0) {
; CHECK-LABEL: @f11(
-; CHECK-NEXT: [[SRC1:%.*]] = getelementptr <32 x i1>, <32 x i1>* [[SRC0:%.*]], i32 1
-; CHECK-NEXT: [[VAL0:%.*]] = load <32 x i1>, <32 x i1>* [[SRC0]], align 4
+; CHECK-NEXT: [[SRC1:%.*]] = getelementptr <32 x i1>, ptr [[SRC0:%.*]], i32 1
+; CHECK-NEXT: [[VAL0:%.*]] = load <32 x i1>, ptr [[SRC0]], align 4
; CHECK-NEXT: [[VAL0_I0:%.*]] = extractelement <32 x i1> [[VAL0]], i32 0
; CHECK-NEXT: [[VAL0_I1:%.*]] = extractelement <32 x i1> [[VAL0]], i32 1
; CHECK-NEXT: [[VAL0_I2:%.*]] = extractelement <32 x i1> [[VAL0]], i32 2
@@ -460,7 +445,7 @@ define void @f11(<32 x i1> *%dest, <32 x i1> *%src0) {
; CHECK-NEXT: [[VAL0_I29:%.*]] = extractelement <32 x i1> [[VAL0]], i32 29
; CHECK-NEXT: [[VAL0_I30:%.*]] = extractelement <32 x i1> [[VAL0]], i32 30
; CHECK-NEXT: [[VAL0_I31:%.*]] = extractelement <32 x i1> [[VAL0]], i32 31
-; CHECK-NEXT: [[VAL1:%.*]] = load <32 x i1>, <32 x i1>* [[SRC1]], align 4
+; CHECK-NEXT: [[VAL1:%.*]] = load <32 x i1>, ptr [[SRC1]], align 4
; CHECK-NEXT: [[VAL1_I0:%.*]] = extractelement <32 x i1> [[VAL1]], i32 0
; CHECK-NEXT: [[AND_I0:%.*]] = and i1 [[VAL0_I0]], [[VAL1_I0]]
; CHECK-NEXT: [[VAL1_I1:%.*]] = extractelement <32 x i1> [[VAL1]], i32 1
@@ -557,47 +542,46 @@ define void @f11(<32 x i1> *%dest, <32 x i1> *%src0) {
; CHECK-NEXT: [[AND_UPTO29:%.*]] = insertelement <32 x i1> [[AND_UPTO28]], i1 [[AND_I29]], i32 29
; CHECK-NEXT: [[AND_UPTO30:%.*]] = insertelement <32 x i1> [[AND_UPTO29]], i1 [[AND_I30]], i32 30
; CHECK-NEXT: [[AND:%.*]] = insertelement <32 x i1> [[AND_UPTO30]], i1 [[AND_I31]], i32 31
-; CHECK-NEXT: store <32 x i1> [[AND]], <32 x i1>* [[DEST:%.*]], align 4
+; CHECK-NEXT: store <32 x i1> [[AND]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
- %src1 = getelementptr <32 x i1>, <32 x i1> *%src0, i32 1
- %val0 = load <32 x i1> , <32 x i1> *%src0
- %val1 = load <32 x i1> , <32 x i1> *%src1
+ %src1 = getelementptr <32 x i1>, ptr %src0, i32 1
+ %val0 = load <32 x i1> , ptr %src0
+ %val1 = load <32 x i1> , ptr %src1
%and = and <32 x i1> %val0, %val1
- store <32 x i1> %and, <32 x i1> *%dest
+ store <32 x i1> %and, ptr %dest
ret void
}
; Test vector GEPs with more than one index.
-define void @f13(<4 x float *> *%dest, <4 x [4 x float] *> %ptr, <4 x i32> %i,
+define void @f13(ptr %dest, <4 x ptr> %ptr, <4 x i32> %i,
; CHECK-LABEL: @f13(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float*>* [[DEST:%.*]] to float**
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 3
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 3
; CHECK-NEXT: [[I_I0:%.*]] = extractelement <4 x i32> [[I:%.*]], i32 0
-; CHECK-NEXT: [[PTR_I0:%.*]] = extractelement <4 x [4 x float]*> [[PTR:%.*]], i32 0
-; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I0]], i32 0, i32 [[I_I0]]
+; CHECK-NEXT: [[PTR_I0:%.*]] = extractelement <4 x ptr> [[PTR:%.*]], i32 0
+; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I0]], i32 0, i32 [[I_I0]]
; CHECK-NEXT: [[I_I1:%.*]] = extractelement <4 x i32> [[I]], i32 1
-; CHECK-NEXT: [[PTR_I1:%.*]] = extractelement <4 x [4 x float]*> [[PTR]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I1]], i32 1, i32 [[I_I1]]
+; CHECK-NEXT: [[PTR_I1:%.*]] = extractelement <4 x ptr> [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I1]], i32 1, i32 [[I_I1]]
; CHECK-NEXT: [[I_I2:%.*]] = extractelement <4 x i32> [[I]], i32 2
-; CHECK-NEXT: [[PTR_I2:%.*]] = extractelement <4 x [4 x float]*> [[PTR]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I2]], i32 2, i32 [[I_I2]]
+; CHECK-NEXT: [[PTR_I2:%.*]] = extractelement <4 x ptr> [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I2]], i32 2, i32 [[I_I2]]
; CHECK-NEXT: [[I_I3:%.*]] = extractelement <4 x i32> [[I]], i32 3
-; CHECK-NEXT: [[PTR_I3:%.*]] = extractelement <4 x [4 x float]*> [[PTR]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I3]], i32 3, i32 [[I_I3]]
-; CHECK-NEXT: store float* [[VAL_I0]], float** [[DEST_I0]], align 32
-; CHECK-NEXT: store float* [[VAL_I1]], float** [[DEST_I1]], align 8
-; CHECK-NEXT: store float* [[VAL_I2]], float** [[DEST_I2]], align 16
-; CHECK-NEXT: store float* [[VAL_I3]], float** [[DEST_I3]], align 8
+; CHECK-NEXT: [[PTR_I3:%.*]] = extractelement <4 x ptr> [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I3]], i32 3, i32 [[I_I3]]
+; CHECK-NEXT: store ptr [[VAL_I0]], ptr [[DEST:%.*]], align 32
+; CHECK-NEXT: store ptr [[VAL_I1]], ptr [[DEST_I1]], align 8
+; CHECK-NEXT: store ptr [[VAL_I2]], ptr [[DEST_I2]], align 16
+; CHECK-NEXT: store ptr [[VAL_I3]], ptr [[DEST_I3]], align 8
; CHECK-NEXT: ret void
;
- float *%other) {
- %val = getelementptr inbounds [4 x float], <4 x [4 x float] *> %ptr,
+ ptr %other) {
+ %val = getelementptr inbounds [4 x float], <4 x ptr> %ptr,
<4 x i32> <i32 0, i32 1, i32 2, i32 3>,
<4 x i32> %i
- store <4 x float *> %val, <4 x float *> *%dest
+ store <4 x ptr> %val, ptr %dest
ret void
}
@@ -656,22 +640,21 @@ exit:
}
; Test unary operator scalarization.
-define void @f15(<4 x float> %init, <4 x float> *%base, i32 %count) {
+define void @f15(<4 x float> %init, ptr %base, i32 %count) {
; CHECK-LABEL: @f15(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[COUNT:%.*]], [[ENTRY:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, <4 x float>* [[BASE:%.*]], i32 [[I]]
-; CHECK-NEXT: [[PTR_I0:%.*]] = bitcast <4 x float>* [[PTR]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[PTR_I0]], align 16
-; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, float* [[PTR_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[PTR_I1]], align 4
-; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, float* [[PTR_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[PTR_I2]], align 8
-; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, float* [[PTR_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[PTR_I3]], align 4
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, ptr [[BASE:%.*]], i32 [[I]]
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[PTR]], align 16
+; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, ptr [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[PTR_I1]], align 4
+; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, ptr [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[PTR_I2]], align 8
+; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, ptr [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[NEG_I0:%.*]] = fneg float [[VAL_I0]]
; CHECK-NEXT: [[NEG_I1:%.*]] = fneg float [[VAL_I1]]
; CHECK-NEXT: [[NEG_I2:%.*]] = fneg float [[VAL_I2]]
@@ -693,10 +676,10 @@ define void @f15(<4 x float> %init, <4 x float> *%base, i32 %count) {
; CHECK-NEXT: [[SEL_I1:%.*]] = select i1 [[CMP_I1]], float [[CALL_I1]], float 6.000000e+00
; CHECK-NEXT: [[SEL_I2:%.*]] = select i1 [[CMP_I2]], float [[CALL_I2]], float 7.000000e+00
; CHECK-NEXT: [[SEL_I3:%.*]] = select i1 [[CMP_I3]], float [[CALL_I3]], float 8.000000e+00
-; CHECK-NEXT: store float [[SEL_I0]], float* [[PTR_I0]], align 16
-; CHECK-NEXT: store float [[SEL_I1]], float* [[PTR_I1]], align 4
-; CHECK-NEXT: store float [[SEL_I2]], float* [[PTR_I2]], align 8
-; CHECK-NEXT: store float [[SEL_I3]], float* [[PTR_I3]], align 4
+; CHECK-NEXT: store float [[SEL_I0]], ptr [[PTR]], align 16
+; CHECK-NEXT: store float [[SEL_I1]], ptr [[PTR_I1]], align 4
+; CHECK-NEXT: store float [[SEL_I2]], ptr [[PTR_I2]], align 8
+; CHECK-NEXT: store float [[SEL_I3]], ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0
; CHECK-NEXT: br i1 [[TEST]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
@@ -710,15 +693,15 @@ loop:
%acc = phi <4 x float> [ %init, %entry ], [ %sel, %loop ]
%nexti = sub i32 %i, 1
- %ptr = getelementptr <4 x float>, <4 x float> *%base, i32 %i
- %val = load <4 x float> , <4 x float> *%ptr
+ %ptr = getelementptr <4 x float>, ptr %base, i32 %i
+ %val = load <4 x float> , ptr %ptr
%neg = fneg <4 x float> %val
%call = call <4 x float> @ext(<4 x float> %neg)
%cmp = fcmp ogt <4 x float> %call,
<float 1.0, float 2.0, float 3.0, float 4.0>
%sel = select <4 x i1> %cmp, <4 x float> %call,
<4 x float> <float 5.0, float 6.0, float 7.0, float 8.0>
- store <4 x float> %sel, <4 x float> *%ptr
+ store <4 x float> %sel, ptr %ptr
%test = icmp eq i32 %nexti, 0
br i1 %test, label %loop, label %exit
diff --git a/llvm/test/Transforms/Scalarizer/basic.ll b/llvm/test/Transforms/Scalarizer/basic.ll
index 9fb6db4de0b76..182e47d45ec13 100644
--- a/llvm/test/Transforms/Scalarizer/basic.ll
+++ b/llvm/test/Transforms/Scalarizer/basic.ll
@@ -5,7 +5,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
declare <4 x float> @ext(<4 x float>)
@g = global <4 x float> zeroinitializer
-define void @f1(<4 x float> %init, <4 x float> *%base, i32 %count) {
+define void @f1(<4 x float> %init, ptr %base, i32 %count) {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[INIT_I0:%.*]] = extractelement <4 x float> [[INIT:%.*]], i32 0
@@ -20,15 +20,14 @@ define void @f1(<4 x float> %init, <4 x float> *%base, i32 %count) {
; CHECK-NEXT: [[ACC_I2:%.*]] = phi float [ [[INIT_I2]], [[ENTRY]] ], [ [[SEL_I2:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[ACC_I3:%.*]] = phi float [ [[INIT_I3]], [[ENTRY]] ], [ [[SEL_I3:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, <4 x float>* [[BASE:%.*]], i32 [[I]]
-; CHECK-NEXT: [[PTR_I0:%.*]] = bitcast <4 x float>* [[PTR]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[PTR_I0]], align 16
-; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, float* [[PTR_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[PTR_I1]], align 4
-; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, float* [[PTR_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[PTR_I2]], align 8
-; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, float* [[PTR_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[PTR_I3]], align 4
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, ptr [[BASE:%.*]], i32 [[I]]
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[PTR]], align 16
+; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, ptr [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[PTR_I1]], align 4
+; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, ptr [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[PTR_I2]], align 8
+; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, ptr [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[ADD_I0:%.*]] = fadd float [[VAL_I0]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I1:%.*]] = fadd float [[VAL_I1]], [[VAL_I3]]
; CHECK-NEXT: [[ADD_I2:%.*]] = fadd float [[ACC_I0]], [[ACC_I2]]
@@ -50,10 +49,10 @@ define void @f1(<4 x float> %init, <4 x float> *%base, i32 %count) {
; CHECK-NEXT: [[SEL_I1]] = select i1 [[CMP_I1]], float [[CALL_I1]], float 6.000000e+00
; CHECK-NEXT: [[SEL_I2]] = select i1 [[CMP_I2]], float [[CALL_I2]], float 7.000000e+00
; CHECK-NEXT: [[SEL_I3]] = select i1 [[CMP_I3]], float [[CALL_I3]], float 8.000000e+00
-; CHECK-NEXT: store float [[SEL_I0]], float* [[PTR_I0]], align 16
-; CHECK-NEXT: store float [[SEL_I1]], float* [[PTR_I1]], align 4
-; CHECK-NEXT: store float [[SEL_I2]], float* [[PTR_I2]], align 8
-; CHECK-NEXT: store float [[SEL_I3]], float* [[PTR_I3]], align 4
+; CHECK-NEXT: store float [[SEL_I0]], ptr [[PTR]], align 16
+; CHECK-NEXT: store float [[SEL_I1]], ptr [[PTR_I1]], align 4
+; CHECK-NEXT: store float [[SEL_I2]], ptr [[PTR_I2]], align 8
+; CHECK-NEXT: store float [[SEL_I3]], ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0
; CHECK-NEXT: br i1 [[TEST]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
@@ -67,8 +66,8 @@ loop:
%acc = phi <4 x float> [ %init, %entry ], [ %sel, %loop ]
%nexti = sub i32 %i, 1
- %ptr = getelementptr <4 x float>, <4 x float> *%base, i32 %i
- %val = load <4 x float> , <4 x float> *%ptr
+ %ptr = getelementptr <4 x float>, ptr %base, i32 %i
+ %val = load <4 x float> , ptr %ptr
%dval = bitcast <4 x float> %val to <2 x double>
%dacc = bitcast <4 x float> %acc to <2 x double>
%shuffle1 = shufflevector <2 x double> %dval, <2 x double> %dacc,
@@ -83,7 +82,7 @@ loop:
<float 1.0, float 2.0, float 3.0, float 4.0>
%sel = select <4 x i1> %cmp, <4 x float> %call,
<4 x float> <float 5.0, float 6.0, float 7.0, float 8.0>
- store <4 x float> %sel, <4 x float> *%ptr
+ store <4 x float> %sel, ptr %ptr
%test = icmp eq i32 %nexti, 0
br i1 %test, label %loop, label %exit
@@ -92,7 +91,7 @@ exit:
ret void
}
-define void @f2(<4 x i32> %init, <4 x i8> *%base, i32 %count) {
+define void @f2(<4 x i32> %init, ptr %base, i32 %count) {
; CHECK-LABEL: @f2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[INIT_I0:%.*]] = extractelement <4 x i32> [[INIT:%.*]], i32 0
@@ -107,15 +106,14 @@ define void @f2(<4 x i32> %init, <4 x i8> *%base, i32 %count) {
; CHECK-NEXT: [[ACC_I2:%.*]] = phi i32 [ [[INIT_I2]], [[ENTRY]] ], [ [[SEL_I2:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[ACC_I3:%.*]] = phi i32 [ [[INIT_I3]], [[ENTRY]] ], [ [[SEL_I3:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x i8>, <4 x i8>* [[BASE:%.*]], i32 [[I]]
-; CHECK-NEXT: [[PTR_I0:%.*]] = bitcast <4 x i8>* [[PTR]] to i8*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i8, i8* [[PTR_I0]], align 4
-; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr i8, i8* [[PTR_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i8, i8* [[PTR_I1]], align 1
-; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr i8, i8* [[PTR_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i8, i8* [[PTR_I2]], align 2
-; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr i8, i8* [[PTR_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i8, i8* [[PTR_I3]], align 1
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x i8>, ptr [[BASE:%.*]], i32 [[I]]
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i8, ptr [[PTR]], align 4
+; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr i8, ptr [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i8, ptr [[PTR_I1]], align 1
+; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr i8, ptr [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i8, ptr [[PTR_I2]], align 2
+; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr i8, ptr [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i8, ptr [[PTR_I3]], align 1
; CHECK-NEXT: [[EXT_I0:%.*]] = sext i8 [[VAL_I0]] to i32
; CHECK-NEXT: [[EXT_I1:%.*]] = sext i8 [[VAL_I1]] to i32
; CHECK-NEXT: [[EXT_I2:%.*]] = sext i8 [[VAL_I2]] to i32
@@ -136,10 +134,10 @@ define void @f2(<4 x i32> %init, <4 x i8> *%base, i32 %count) {
; CHECK-NEXT: [[TRUNC_I1:%.*]] = trunc i32 [[SEL_I1]] to i8
; CHECK-NEXT: [[TRUNC_I2:%.*]] = trunc i32 [[SEL_I2]] to i8
; CHECK-NEXT: [[TRUNC_I3:%.*]] = trunc i32 [[SEL_I3]] to i8
-; CHECK-NEXT: store i8 [[TRUNC_I0]], i8* [[PTR_I0]], align 4
-; CHECK-NEXT: store i8 [[TRUNC_I1]], i8* [[PTR_I1]], align 1
-; CHECK-NEXT: store i8 [[TRUNC_I2]], i8* [[PTR_I2]], align 2
-; CHECK-NEXT: store i8 [[TRUNC_I3]], i8* [[PTR_I3]], align 1
+; CHECK-NEXT: store i8 [[TRUNC_I0]], ptr [[PTR]], align 4
+; CHECK-NEXT: store i8 [[TRUNC_I1]], ptr [[PTR_I1]], align 1
+; CHECK-NEXT: store i8 [[TRUNC_I2]], ptr [[PTR_I2]], align 2
+; CHECK-NEXT: store i8 [[TRUNC_I3]], ptr [[PTR_I3]], align 1
; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0
; CHECK-NEXT: br i1 [[TEST]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
@@ -153,8 +151,8 @@ loop:
%acc = phi <4 x i32> [ %init, %entry ], [ %sel, %loop ]
%nexti = sub i32 %i, 1
- %ptr = getelementptr <4 x i8>, <4 x i8> *%base, i32 %i
- %val = load <4 x i8> , <4 x i8> *%ptr
+ %ptr = getelementptr <4 x i8>, ptr %base, i32 %i
+ %val = load <4 x i8> , ptr %ptr
%ext = sext <4 x i8> %val to <4 x i32>
%add = add <4 x i32> %ext, %acc
%cmp = icmp slt <4 x i32> %add, <i32 -10, i32 -11, i32 -12, i32 -13>
@@ -163,7 +161,7 @@ loop:
<4 x i32> zeroinitializer
%sel = select <4 x i1> %cmp, <4 x i32> %add, <4 x i32> %limit
%trunc = trunc <4 x i32> %sel to <4 x i8>
- store <4 x i8> %trunc, <4 x i8> *%ptr
+ store <4 x i8> %trunc, ptr %ptr
%test = icmp eq i32 %nexti, 0
br i1 %test, label %loop, label %exit
@@ -173,96 +171,90 @@ exit:
}
; Check that !tbaa information is preserved.
-define void @f3(<4 x i32> *%src, <4 x i32> *%dst) {
+define void @f3(ptr %src, ptr %dst) {
; CHECK-LABEL: @f3(
-; CHECK-NEXT: [[DST_I0:%.*]] = bitcast <4 x i32>* [[DST:%.*]] to i32*
-; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 1
-; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 2
-; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[SRC_I0]], align 16, !tbaa [[TBAA0:![0-9]+]]
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[SRC_I1]], align 4, !tbaa [[TBAA0]]
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[SRC_I2]], align 8, !tbaa [[TBAA0]]
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[SRC_I3]], align 4, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 1
+; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 2
+; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC:%.*]], align 16, !tbaa [[TBAA0:![0-9]+]]
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4, !tbaa [[TBAA0]]
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[DST_I0]], align 16, !tbaa [[TBAA3:![0-9]+]]
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[DST_I1]], align 4, !tbaa [[TBAA3]]
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[DST_I2]], align 8, !tbaa [[TBAA3]]
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[DST_I3]], align 4, !tbaa [[TBAA3]]
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST:%.*]], align 16, !tbaa [[TBAA3:![0-9]+]]
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4, !tbaa [[TBAA3]]
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8, !tbaa [[TBAA3]]
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4, !tbaa [[TBAA3]]
; CHECK-NEXT: ret void
;
- %val = load <4 x i32> , <4 x i32> *%src, !tbaa !1
+ %val = load <4 x i32> , ptr %src, !tbaa !1
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%dst, !tbaa !2
+ store <4 x i32> %add, ptr %dst, !tbaa !2
ret void
}
; Check that !tbaa.struct information is preserved.
-define void @f4(<4 x i32> *%src, <4 x i32> *%dst) {
+define void @f4(ptr %src, ptr %dst) {
; CHECK-LABEL: @f4(
-; CHECK-NEXT: [[DST_I0:%.*]] = bitcast <4 x i32>* [[DST:%.*]] to i32*
-; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 1
-; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 2
-; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[SRC_I0]], align 16, !tbaa.struct !5
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[SRC_I1]], align 4, !tbaa.struct !5
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[SRC_I2]], align 8, !tbaa.struct !5
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[SRC_I3]], align 4, !tbaa.struct !5
+; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 1
+; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 2
+; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC:%.*]], align 16, !tbaa.struct !5
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4, !tbaa.struct !5
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8, !tbaa.struct !5
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4, !tbaa.struct !5
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[DST_I0]], align 16, !tbaa.struct !5
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[DST_I1]], align 4, !tbaa.struct !5
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[DST_I2]], align 8, !tbaa.struct !5
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[DST_I3]], align 4, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST:%.*]], align 16, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8, !tbaa.struct !5
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4, !tbaa.struct !5
; CHECK-NEXT: ret void
;
- %val = load <4 x i32> , <4 x i32> *%src, !tbaa.struct !5
+ %val = load <4 x i32> , ptr %src, !tbaa.struct !5
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%dst, !tbaa.struct !5
+ store <4 x i32> %add, ptr %dst, !tbaa.struct !5
ret void
}
; Check that llvm.access.group information is preserved.
-define void @f5(i32 %count, <4 x i32> *%src, <4 x i32> *%dst) {
+define void @f5(i32 %count, ptr %src, ptr %dst) {
; CHECK-LABEL: @f5(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[NEXT_INDEX:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[THIS_SRC:%.*]] = getelementptr <4 x i32>, <4 x i32>* [[SRC:%.*]], i32 [[INDEX]]
-; CHECK-NEXT: [[THIS_SRC_I0:%.*]] = bitcast <4 x i32>* [[THIS_SRC]] to i32*
-; CHECK-NEXT: [[THIS_SRC_I1:%.*]] = getelementptr i32, i32* [[THIS_SRC_I0]], i32 1
-; CHECK-NEXT: [[THIS_SRC_I2:%.*]] = getelementptr i32, i32* [[THIS_SRC_I0]], i32 2
-; CHECK-NEXT: [[THIS_SRC_I3:%.*]] = getelementptr i32, i32* [[THIS_SRC_I0]], i32 3
-; CHECK-NEXT: [[THIS_DST:%.*]] = getelementptr <4 x i32>, <4 x i32>* [[DST:%.*]], i32 [[INDEX]]
-; CHECK-NEXT: [[THIS_DST_I0:%.*]] = bitcast <4 x i32>* [[THIS_DST]] to i32*
-; CHECK-NEXT: [[THIS_DST_I1:%.*]] = getelementptr i32, i32* [[THIS_DST_I0]], i32 1
-; CHECK-NEXT: [[THIS_DST_I2:%.*]] = getelementptr i32, i32* [[THIS_DST_I0]], i32 2
-; CHECK-NEXT: [[THIS_DST_I3:%.*]] = getelementptr i32, i32* [[THIS_DST_I0]], i32 3
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[THIS_SRC_I0]], align 16, !llvm.access.group !6
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[THIS_SRC_I1]], align 4, !llvm.access.group !6
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[THIS_SRC_I2]], align 8, !llvm.access.group !6
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[THIS_SRC_I3]], align 4, !llvm.access.group !6
+; CHECK-NEXT: [[THIS_SRC:%.*]] = getelementptr <4 x i32>, ptr [[SRC:%.*]], i32 [[INDEX]]
+; CHECK-NEXT: [[THIS_SRC_I1:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 1
+; CHECK-NEXT: [[THIS_SRC_I2:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 2
+; CHECK-NEXT: [[THIS_SRC_I3:%.*]] = getelementptr i32, ptr [[THIS_SRC]], i32 3
+; CHECK-NEXT: [[THIS_DST:%.*]] = getelementptr <4 x i32>, ptr [[DST:%.*]], i32 [[INDEX]]
+; CHECK-NEXT: [[THIS_DST_I1:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 1
+; CHECK-NEXT: [[THIS_DST_I2:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 2
+; CHECK-NEXT: [[THIS_DST_I3:%.*]] = getelementptr i32, ptr [[THIS_DST]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[THIS_SRC]], align 16, !llvm.access.group !6
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[THIS_SRC_I1]], align 4, !llvm.access.group !6
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[THIS_SRC_I2]], align 8, !llvm.access.group !6
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[THIS_SRC_I3]], align 4, !llvm.access.group !6
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[THIS_DST_I0]], align 16, !llvm.access.group !6
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[THIS_DST_I1]], align 4, !llvm.access.group !6
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[THIS_DST_I2]], align 8, !llvm.access.group !6
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[THIS_DST_I3]], align 4, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[THIS_DST]], align 16, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[THIS_DST_I1]], align 4, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[THIS_DST_I2]], align 8, !llvm.access.group !6
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[THIS_DST_I3]], align 4, !llvm.access.group !6
; CHECK-NEXT: [[NEXT_INDEX]] = add i32 [[INDEX]], -1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[NEXT_INDEX]], [[COUNT:%.*]]
; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[END:%.*]], !llvm.loop [[LOOP7:![0-9]+]]
@@ -274,11 +266,11 @@ entry:
loop:
%index = phi i32 [ 0, %entry ], [ %next_index, %loop ]
- %this_src = getelementptr <4 x i32>, <4 x i32> *%src, i32 %index
- %this_dst = getelementptr <4 x i32>, <4 x i32> *%dst, i32 %index
- %val = load <4 x i32> , <4 x i32> *%this_src, !llvm.access.group !13
+ %this_src = getelementptr <4 x i32>, ptr %src, i32 %index
+ %this_dst = getelementptr <4 x i32>, ptr %dst, i32 %index
+ %val = load <4 x i32> , ptr %this_src, !llvm.access.group !13
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%this_dst, !llvm.access.group !13
+ store <4 x i32> %add, ptr %this_dst, !llvm.access.group !13
%next_index = add i32 %index, -1
%continue = icmp ne i32 %next_index, %count
br i1 %continue, label %loop, label %end, !llvm.loop !3
@@ -310,124 +302,117 @@ define <4 x float> @f6(<4 x float> %x) {
}
; Check that random metadata isn't kept.
-define void @f7(<4 x i32> *%src, <4 x i32> *%dst) {
+define void @f7(ptr %src, ptr %dst) {
; CHECK-LABEL: @f7(
-; CHECK-NEXT: [[DST_I0:%.*]] = bitcast <4 x i32>* [[DST:%.*]] to i32*
-; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 1
-; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 2
-; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, i32* [[DST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, i32* [[SRC_I0]], align 16
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, i32* [[SRC_I1]], align 4
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, i32* [[SRC_I2]], align 8
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, i32* [[SRC_I3]], align 4
+; CHECK-NEXT: [[DST_I1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 1
+; CHECK-NEXT: [[DST_I2:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 2
+; CHECK-NEXT: [[DST_I3:%.*]] = getelementptr i32, ptr [[DST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load i32, ptr [[SRC:%.*]], align 16
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4
; CHECK-NEXT: [[ADD_I0:%.*]] = add i32 [[VAL_I0]], [[VAL_I0]]
; CHECK-NEXT: [[ADD_I1:%.*]] = add i32 [[VAL_I1]], [[VAL_I1]]
; CHECK-NEXT: [[ADD_I2:%.*]] = add i32 [[VAL_I2]], [[VAL_I2]]
; CHECK-NEXT: [[ADD_I3:%.*]] = add i32 [[VAL_I3]], [[VAL_I3]]
-; CHECK-NEXT: store i32 [[ADD_I0]], i32* [[DST_I0]], align 16
-; CHECK-NEXT: store i32 [[ADD_I1]], i32* [[DST_I1]], align 4
-; CHECK-NEXT: store i32 [[ADD_I2]], i32* [[DST_I2]], align 8
-; CHECK-NEXT: store i32 [[ADD_I3]], i32* [[DST_I3]], align 4
+; CHECK-NEXT: store i32 [[ADD_I0]], ptr [[DST:%.*]], align 16
+; CHECK-NEXT: store i32 [[ADD_I1]], ptr [[DST_I1]], align 4
+; CHECK-NEXT: store i32 [[ADD_I2]], ptr [[DST_I2]], align 8
+; CHECK-NEXT: store i32 [[ADD_I3]], ptr [[DST_I3]], align 4
; CHECK-NEXT: ret void
;
- %val = load <4 x i32> , <4 x i32> *%src, !foo !5
+ %val = load <4 x i32> , ptr %src, !foo !5
%add = add <4 x i32> %val, %val
- store <4 x i32> %add, <4 x i32> *%dst, !foo !5
+ store <4 x i32> %add, ptr %dst, !foo !5
ret void
}
; Test GEP with vectors.
-define void @f8(<4 x float *> *%dest, <4 x float *> %ptr0, <4 x i32> %i0,
+define void @f8(ptr %dest, <4 x ptr> %ptr0, <4 x i32> %i0,
; CHECK-LABEL: @f8(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float*>* [[DEST:%.*]] to float**
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 3
-; CHECK-NEXT: [[PTR0_I0:%.*]] = extractelement <4 x float*> [[PTR0:%.*]], i32 0
-; CHECK-NEXT: [[PTR0_I2:%.*]] = extractelement <4 x float*> [[PTR0]], i32 2
-; CHECK-NEXT: [[PTR0_I3:%.*]] = extractelement <4 x float*> [[PTR0]], i32 3
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 3
+; CHECK-NEXT: [[PTR0_I0:%.*]] = extractelement <4 x ptr> [[PTR0:%.*]], i32 0
+; CHECK-NEXT: [[PTR0_I2:%.*]] = extractelement <4 x ptr> [[PTR0]], i32 2
+; CHECK-NEXT: [[PTR0_I3:%.*]] = extractelement <4 x ptr> [[PTR0]], i32 3
; CHECK-NEXT: [[I0_I1:%.*]] = extractelement <4 x i32> [[I0:%.*]], i32 1
; CHECK-NEXT: [[I0_I3:%.*]] = extractelement <4 x i32> [[I0]], i32 3
-; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr float, float* [[PTR0_I0]], i32 100
-; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr float, float* [[OTHER:%.*]], i32 [[I0_I1]]
-; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr float, float* [[PTR0_I2]], i32 100
-; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr float, float* [[PTR0_I3]], i32 [[I0_I3]]
-; CHECK-NEXT: store float* [[VAL_I0]], float** [[DEST_I0]], align 32
-; CHECK-NEXT: store float* [[VAL_I1]], float** [[DEST_I1]], align 8
-; CHECK-NEXT: store float* [[VAL_I2]], float** [[DEST_I2]], align 16
-; CHECK-NEXT: store float* [[VAL_I3]], float** [[DEST_I3]], align 8
+; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr float, ptr [[PTR0_I0]], i32 100
+; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr float, ptr [[OTHER:%.*]], i32 [[I0_I1]]
+; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr float, ptr [[PTR0_I2]], i32 100
+; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr float, ptr [[PTR0_I3]], i32 [[I0_I3]]
+; CHECK-NEXT: store ptr [[VAL_I0]], ptr [[DEST:%.*]], align 32
+; CHECK-NEXT: store ptr [[VAL_I1]], ptr [[DEST_I1]], align 8
+; CHECK-NEXT: store ptr [[VAL_I2]], ptr [[DEST_I2]], align 16
+; CHECK-NEXT: store ptr [[VAL_I3]], ptr [[DEST_I3]], align 8
; CHECK-NEXT: ret void
;
- float *%other) {
+ ptr %other) {
%i1 = insertelement <4 x i32> %i0, i32 100, i32 0
%i2 = insertelement <4 x i32> %i1, i32 100, i32 2
- %ptr1 = insertelement <4 x float *> %ptr0, float *%other, i32 1
- %val = getelementptr float, <4 x float *> %ptr1, <4 x i32> %i2
- store <4 x float *> %val, <4 x float *> *%dest
+ %ptr1 = insertelement <4 x ptr> %ptr0, ptr %other, i32 1
+ %val = getelementptr float, <4 x ptr> %ptr1, <4 x i32> %i2
+ store <4 x ptr> %val, ptr %dest
ret void
}
; Test the handling of unaligned loads.
-define void @f9(<4 x float> *%dest, <4 x float> *%src) {
+define void @f9(ptr %dest, ptr %src) {
; CHECK-LABEL: @f9(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float>* [[DEST:%.*]] to float*
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, float* [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, float* [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, float* [[DEST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x float>* [[SRC:%.*]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[SRC_I0]], align 4
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, float* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[SRC_I1]], align 4
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, float* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[SRC_I2]], align 4
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, float* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[SRC_I3]], align 4
-; CHECK-NEXT: store float [[VAL_I0]], float* [[DEST_I0]], align 8
-; CHECK-NEXT: store float [[VAL_I1]], float* [[DEST_I1]], align 4
-; CHECK-NEXT: store float [[VAL_I2]], float* [[DEST_I2]], align 8
-; CHECK-NEXT: store float [[VAL_I3]], float* [[DEST_I3]], align 4
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[SRC:%.*]], align 4
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[SRC_I1]], align 4
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[SRC_I2]], align 4
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[SRC_I3]], align 4
+; CHECK-NEXT: store float [[VAL_I0]], ptr [[DEST:%.*]], align 8
+; CHECK-NEXT: store float [[VAL_I1]], ptr [[DEST_I1]], align 4
+; CHECK-NEXT: store float [[VAL_I2]], ptr [[DEST_I2]], align 8
+; CHECK-NEXT: store float [[VAL_I3]], ptr [[DEST_I3]], align 4
; CHECK-NEXT: ret void
;
- %val = load <4 x float> , <4 x float> *%src, align 4
- store <4 x float> %val, <4 x float> *%dest, align 8
+ %val = load <4 x float> , ptr %src, align 4
+ store <4 x float> %val, ptr %dest, align 8
ret void
}
; ...and again with subelement alignment.
-define void @f10(<4 x float> *%dest, <4 x float> *%src) {
+define void @f10(ptr %dest, ptr %src) {
; CHECK-LABEL: @f10(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float>* [[DEST:%.*]] to float*
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, float* [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, float* [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, float* [[DEST_I0]], i32 3
-; CHECK-NEXT: [[SRC_I0:%.*]] = bitcast <4 x float>* [[SRC:%.*]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[SRC_I0]], align 1
-; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, float* [[SRC_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[SRC_I1]], align 1
-; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, float* [[SRC_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[SRC_I2]], align 1
-; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, float* [[SRC_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[SRC_I3]], align 1
-; CHECK-NEXT: store float [[VAL_I0]], float* [[DEST_I0]], align 2
-; CHECK-NEXT: store float [[VAL_I1]], float* [[DEST_I1]], align 2
-; CHECK-NEXT: store float [[VAL_I2]], float* [[DEST_I2]], align 2
-; CHECK-NEXT: store float [[VAL_I3]], float* [[DEST_I3]], align 2
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float, ptr [[DEST:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[SRC:%.*]], align 1
+; CHECK-NEXT: [[SRC_I1:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[SRC_I1]], align 1
+; CHECK-NEXT: [[SRC_I2:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[SRC_I2]], align 1
+; CHECK-NEXT: [[SRC_I3:%.*]] = getelementptr float, ptr [[SRC:%.*]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[SRC_I3]], align 1
+; CHECK-NEXT: store float [[VAL_I0]], ptr [[DEST:%.*]], align 2
+; CHECK-NEXT: store float [[VAL_I1]], ptr [[DEST_I1]], align 2
+; CHECK-NEXT: store float [[VAL_I2]], ptr [[DEST_I2]], align 2
+; CHECK-NEXT: store float [[VAL_I3]], ptr [[DEST_I3]], align 2
; CHECK-NEXT: ret void
;
- %val = load <4 x float> , <4 x float> *%src, align 1
- store <4 x float> %val, <4 x float> *%dest, align 2
+ %val = load <4 x float> , ptr %src, align 1
+ store <4 x float> %val, ptr %dest, align 2
ret void
}
; Test that sub-byte loads aren't scalarized.
-define void @f11(<32 x i1> *%dest, <32 x i1> *%src0) {
+define void @f11(ptr %dest, ptr %src0) {
; CHECK-LABEL: @f11(
-; CHECK-NEXT: [[SRC1:%.*]] = getelementptr <32 x i1>, <32 x i1>* [[SRC0:%.*]], i32 1
-; CHECK-NEXT: [[VAL0:%.*]] = load <32 x i1>, <32 x i1>* [[SRC0]], align 4
+; CHECK-NEXT: [[SRC1:%.*]] = getelementptr <32 x i1>, ptr [[SRC0:%.*]], i32 1
+; CHECK-NEXT: [[VAL0:%.*]] = load <32 x i1>, ptr [[SRC0]], align 4
; CHECK-NEXT: [[VAL0_I0:%.*]] = extractelement <32 x i1> [[VAL0]], i32 0
; CHECK-NEXT: [[VAL0_I1:%.*]] = extractelement <32 x i1> [[VAL0]], i32 1
; CHECK-NEXT: [[VAL0_I2:%.*]] = extractelement <32 x i1> [[VAL0]], i32 2
@@ -460,7 +445,7 @@ define void @f11(<32 x i1> *%dest, <32 x i1> *%src0) {
; CHECK-NEXT: [[VAL0_I29:%.*]] = extractelement <32 x i1> [[VAL0]], i32 29
; CHECK-NEXT: [[VAL0_I30:%.*]] = extractelement <32 x i1> [[VAL0]], i32 30
; CHECK-NEXT: [[VAL0_I31:%.*]] = extractelement <32 x i1> [[VAL0]], i32 31
-; CHECK-NEXT: [[VAL1:%.*]] = load <32 x i1>, <32 x i1>* [[SRC1]], align 4
+; CHECK-NEXT: [[VAL1:%.*]] = load <32 x i1>, ptr [[SRC1]], align 4
; CHECK-NEXT: [[VAL1_I0:%.*]] = extractelement <32 x i1> [[VAL1]], i32 0
; CHECK-NEXT: [[AND_I0:%.*]] = and i1 [[VAL0_I0]], [[VAL1_I0]]
; CHECK-NEXT: [[VAL1_I1:%.*]] = extractelement <32 x i1> [[VAL1]], i32 1
@@ -557,47 +542,46 @@ define void @f11(<32 x i1> *%dest, <32 x i1> *%src0) {
; CHECK-NEXT: [[AND_UPTO29:%.*]] = insertelement <32 x i1> [[AND_UPTO28]], i1 [[AND_I29]], i32 29
; CHECK-NEXT: [[AND_UPTO30:%.*]] = insertelement <32 x i1> [[AND_UPTO29]], i1 [[AND_I30]], i32 30
; CHECK-NEXT: [[AND:%.*]] = insertelement <32 x i1> [[AND_UPTO30]], i1 [[AND_I31]], i32 31
-; CHECK-NEXT: store <32 x i1> [[AND]], <32 x i1>* [[DEST:%.*]], align 4
+; CHECK-NEXT: store <32 x i1> [[AND]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
- %src1 = getelementptr <32 x i1>, <32 x i1> *%src0, i32 1
- %val0 = load <32 x i1> , <32 x i1> *%src0
- %val1 = load <32 x i1> , <32 x i1> *%src1
+ %src1 = getelementptr <32 x i1>, ptr %src0, i32 1
+ %val0 = load <32 x i1> , ptr %src0
+ %val1 = load <32 x i1> , ptr %src1
%and = and <32 x i1> %val0, %val1
- store <32 x i1> %and, <32 x i1> *%dest
+ store <32 x i1> %and, ptr %dest
ret void
}
; Test vector GEPs with more than one index.
-define void @f13(<4 x float *> *%dest, <4 x [4 x float] *> %ptr, <4 x i32> %i,
+define void @f13(ptr %dest, <4 x ptr> %ptr, <4 x i32> %i,
; CHECK-LABEL: @f13(
-; CHECK-NEXT: [[DEST_I0:%.*]] = bitcast <4 x float*>* [[DEST:%.*]] to float**
-; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 1
-; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 2
-; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr float*, float** [[DEST_I0]], i32 3
+; CHECK-NEXT: [[DEST_I1:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 1
+; CHECK-NEXT: [[DEST_I2:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 2
+; CHECK-NEXT: [[DEST_I3:%.*]] = getelementptr ptr, ptr [[DEST:%.*]], i32 3
; CHECK-NEXT: [[I_I0:%.*]] = extractelement <4 x i32> [[I:%.*]], i32 0
-; CHECK-NEXT: [[PTR_I0:%.*]] = extractelement <4 x [4 x float]*> [[PTR:%.*]], i32 0
-; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I0]], i32 0, i32 [[I_I0]]
+; CHECK-NEXT: [[PTR_I0:%.*]] = extractelement <4 x ptr> [[PTR:%.*]], i32 0
+; CHECK-NEXT: [[VAL_I0:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I0]], i32 0, i32 [[I_I0]]
; CHECK-NEXT: [[I_I1:%.*]] = extractelement <4 x i32> [[I]], i32 1
-; CHECK-NEXT: [[PTR_I1:%.*]] = extractelement <4 x [4 x float]*> [[PTR]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I1]], i32 1, i32 [[I_I1]]
+; CHECK-NEXT: [[PTR_I1:%.*]] = extractelement <4 x ptr> [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I1]], i32 1, i32 [[I_I1]]
; CHECK-NEXT: [[I_I2:%.*]] = extractelement <4 x i32> [[I]], i32 2
-; CHECK-NEXT: [[PTR_I2:%.*]] = extractelement <4 x [4 x float]*> [[PTR]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I2]], i32 2, i32 [[I_I2]]
+; CHECK-NEXT: [[PTR_I2:%.*]] = extractelement <4 x ptr> [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I2]], i32 2, i32 [[I_I2]]
; CHECK-NEXT: [[I_I3:%.*]] = extractelement <4 x i32> [[I]], i32 3
-; CHECK-NEXT: [[PTR_I3:%.*]] = extractelement <4 x [4 x float]*> [[PTR]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr inbounds [4 x float], [4 x float]* [[PTR_I3]], i32 3, i32 [[I_I3]]
-; CHECK-NEXT: store float* [[VAL_I0]], float** [[DEST_I0]], align 32
-; CHECK-NEXT: store float* [[VAL_I1]], float** [[DEST_I1]], align 8
-; CHECK-NEXT: store float* [[VAL_I2]], float** [[DEST_I2]], align 16
-; CHECK-NEXT: store float* [[VAL_I3]], float** [[DEST_I3]], align 8
+; CHECK-NEXT: [[PTR_I3:%.*]] = extractelement <4 x ptr> [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = getelementptr inbounds [4 x float], ptr [[PTR_I3]], i32 3, i32 [[I_I3]]
+; CHECK-NEXT: store ptr [[VAL_I0]], ptr [[DEST:%.*]], align 32
+; CHECK-NEXT: store ptr [[VAL_I1]], ptr [[DEST_I1]], align 8
+; CHECK-NEXT: store ptr [[VAL_I2]], ptr [[DEST_I2]], align 16
+; CHECK-NEXT: store ptr [[VAL_I3]], ptr [[DEST_I3]], align 8
; CHECK-NEXT: ret void
;
- float *%other) {
- %val = getelementptr inbounds [4 x float], <4 x [4 x float] *> %ptr,
+ ptr %other) {
+ %val = getelementptr inbounds [4 x float], <4 x ptr> %ptr,
<4 x i32> <i32 0, i32 1, i32 2, i32 3>,
<4 x i32> %i
- store <4 x float *> %val, <4 x float *> *%dest
+ store <4 x ptr> %val, ptr %dest
ret void
}
@@ -656,22 +640,21 @@ exit:
}
; Test unary operator scalarization.
-define void @f15(<4 x float> %init, <4 x float> *%base, i32 %count) {
+define void @f15(<4 x float> %init, ptr %base, i32 %count) {
; CHECK-LABEL: @f15(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[COUNT:%.*]], [[ENTRY:%.*]] ], [ [[NEXTI:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[NEXTI]] = sub i32 [[I]], 1
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, <4 x float>* [[BASE:%.*]], i32 [[I]]
-; CHECK-NEXT: [[PTR_I0:%.*]] = bitcast <4 x float>* [[PTR]] to float*
-; CHECK-NEXT: [[VAL_I0:%.*]] = load float, float* [[PTR_I0]], align 16
-; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, float* [[PTR_I0]], i32 1
-; CHECK-NEXT: [[VAL_I1:%.*]] = load float, float* [[PTR_I1]], align 4
-; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, float* [[PTR_I0]], i32 2
-; CHECK-NEXT: [[VAL_I2:%.*]] = load float, float* [[PTR_I2]], align 8
-; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, float* [[PTR_I0]], i32 3
-; CHECK-NEXT: [[VAL_I3:%.*]] = load float, float* [[PTR_I3]], align 4
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr <4 x float>, ptr [[BASE:%.*]], i32 [[I]]
+; CHECK-NEXT: [[VAL_I0:%.*]] = load float, ptr [[PTR]], align 16
+; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr float, ptr [[PTR]], i32 1
+; CHECK-NEXT: [[VAL_I1:%.*]] = load float, ptr [[PTR_I1]], align 4
+; CHECK-NEXT: [[PTR_I2:%.*]] = getelementptr float, ptr [[PTR]], i32 2
+; CHECK-NEXT: [[VAL_I2:%.*]] = load float, ptr [[PTR_I2]], align 8
+; CHECK-NEXT: [[PTR_I3:%.*]] = getelementptr float, ptr [[PTR]], i32 3
+; CHECK-NEXT: [[VAL_I3:%.*]] = load float, ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[NEG_I0:%.*]] = fneg float [[VAL_I0]]
; CHECK-NEXT: [[NEG_I1:%.*]] = fneg float [[VAL_I1]]
; CHECK-NEXT: [[NEG_I2:%.*]] = fneg float [[VAL_I2]]
@@ -693,10 +676,10 @@ define void @f15(<4 x float> %init, <4 x float> *%base, i32 %count) {
; CHECK-NEXT: [[SEL_I1:%.*]] = select i1 [[CMP_I1]], float [[CALL_I1]], float 6.000000e+00
; CHECK-NEXT: [[SEL_I2:%.*]] = select i1 [[CMP_I2]], float [[CALL_I2]], float 7.000000e+00
; CHECK-NEXT: [[SEL_I3:%.*]] = select i1 [[CMP_I3]], float [[CALL_I3]], float 8.000000e+00
-; CHECK-NEXT: store float [[SEL_I0]], float* [[PTR_I0]], align 16
-; CHECK-NEXT: store float [[SEL_I1]], float* [[PTR_I1]], align 4
-; CHECK-NEXT: store float [[SEL_I2]], float* [[PTR_I2]], align 8
-; CHECK-NEXT: store float [[SEL_I3]], float* [[PTR_I3]], align 4
+; CHECK-NEXT: store float [[SEL_I0]], ptr [[PTR]], align 16
+; CHECK-NEXT: store float [[SEL_I1]], ptr [[PTR_I1]], align 4
+; CHECK-NEXT: store float [[SEL_I2]], ptr [[PTR_I2]], align 8
+; CHECK-NEXT: store float [[SEL_I3]], ptr [[PTR_I3]], align 4
; CHECK-NEXT: [[TEST:%.*]] = icmp eq i32 [[NEXTI]], 0
; CHECK-NEXT: br i1 [[TEST]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
@@ -710,15 +693,15 @@ loop:
%acc = phi <4 x float> [ %init, %entry ], [ %sel, %loop ]
%nexti = sub i32 %i, 1
- %ptr = getelementptr <4 x float>, <4 x float> *%base, i32 %i
- %val = load <4 x float> , <4 x float> *%ptr
+ %ptr = getelementptr <4 x float>, ptr %base, i32 %i
+ %val = load <4 x float> , ptr %ptr
%neg = fneg <4 x float> %val
%call = call <4 x float> @ext(<4 x float> %neg)
%cmp = fcmp ogt <4 x float> %call,
<float 1.0, float 2.0, float 3.0, float 4.0>
%sel = select <4 x i1> %cmp, <4 x float> %call,
<4 x float> <float 5.0, float 6.0, float 7.0, float 8.0>
- store <4 x float> %sel, <4 x float> *%ptr
+ store <4 x float> %sel, ptr %ptr
%test = icmp eq i32 %nexti, 0
br i1 %test, label %loop, label %exit
diff --git a/llvm/test/Transforms/Scalarizer/constant-extractelement.ll b/llvm/test/Transforms/Scalarizer/constant-extractelement.ll
index 2bd324c894bf2..d3c66126f469d 100644
--- a/llvm/test/Transforms/Scalarizer/constant-extractelement.ll
+++ b/llvm/test/Transforms/Scalarizer/constant-extractelement.ll
@@ -4,15 +4,14 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
; Test that constant extracts are nicely scalarized
-define i32 @f1(<4 x i32> *%src, i32 %index) {
+define i32 @f1(ptr %src, i32 %index) {
; ALL-LABEL: @f1(
-; ALL-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; ALL-NEXT: [[SRC_I3:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 3
-; ALL-NEXT: [[VAL0_I3:%.*]] = load i32, i32* [[SRC_I3]], align 4
+; ALL-NEXT: [[SRC_I3:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 3
+; ALL-NEXT: [[VAL0_I3:%.*]] = load i32, ptr [[SRC_I3]], align 4
; ALL-NEXT: [[VAL2:%.*]] = shl i32 4, [[VAL0_I3]]
; ALL-NEXT: ret i32 [[VAL2]]
;
- %val0 = load <4 x i32> , <4 x i32> *%src
+ %val0 = load <4 x i32> , ptr %src
%val1 = shl <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %val0
%val2 = extractelement <4 x i32> %val1, i32 3
ret i32 %val2
diff --git a/llvm/test/Transforms/Scalarizer/constant-insertelement.ll b/llvm/test/Transforms/Scalarizer/constant-insertelement.ll
index 4e2ade287f6aa..e4934fefc1eb6 100644
--- a/llvm/test/Transforms/Scalarizer/constant-insertelement.ll
+++ b/llvm/test/Transforms/Scalarizer/constant-insertelement.ll
@@ -4,14 +4,13 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
; Test that constant inserts are nicely scalarized
-define <4 x i32> @f1(<4 x i32> *%src, i32 %repl, i32 %index) {
+define <4 x i32> @f1(ptr %src, i32 %repl, i32 %index) {
; ALL-LABEL: @f1(
-; ALL-NEXT: [[SRC_I0:%.*]] = bitcast <4 x i32>* [[SRC:%.*]] to i32*
-; ALL-NEXT: [[VAL0_I0:%.*]] = load i32, i32* [[SRC_I0]], align 16
-; ALL-NEXT: [[SRC_I1:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 1
-; ALL-NEXT: [[VAL0_I1:%.*]] = load i32, i32* [[SRC_I1]], align 4
-; ALL-NEXT: [[SRC_I2:%.*]] = getelementptr i32, i32* [[SRC_I0]], i32 2
-; ALL-NEXT: [[VAL0_I2:%.*]] = load i32, i32* [[SRC_I2]], align 8
+; ALL-NEXT: [[VAL0_I0:%.*]] = load i32, ptr [[SRC:%.*]], align 16
+; ALL-NEXT: [[SRC_I1:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 1
+; ALL-NEXT: [[VAL0_I1:%.*]] = load i32, ptr [[SRC_I1]], align 4
+; ALL-NEXT: [[SRC_I2:%.*]] = getelementptr i32, ptr [[SRC:%.*]], i32 2
+; ALL-NEXT: [[VAL0_I2:%.*]] = load i32, ptr [[SRC_I2]], align 8
; ALL-NEXT: [[VAL2_I0:%.*]] = shl i32 1, [[VAL0_I0]]
; ALL-NEXT: [[VAL2_I1:%.*]] = shl i32 2, [[VAL0_I1]]
; ALL-NEXT: [[VAL2_I2:%.*]] = shl i32 3, [[VAL0_I2]]
@@ -22,7 +21,7 @@ define <4 x i32> @f1(<4 x i32> *%src, i32 %repl, i32 %index) {
; ALL-NEXT: [[VAL2:%.*]] = insertelement <4 x i32> [[VAL2_UPTO2]], i32 [[VAL2_I3]], i32 3
; ALL-NEXT: ret <4 x i32> [[VAL2]]
;
- %val0 = load <4 x i32> , <4 x i32> *%src
+ %val0 = load <4 x i32> , ptr %src
%val1 = insertelement <4 x i32> %val0, i32 %repl, i32 3
%val2 = shl <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %val1
ret <4 x i32> %val2
diff --git a/llvm/test/Transforms/Scalarizer/crash-bug.ll b/llvm/test/Transforms/Scalarizer/crash-bug.ll
index 6fe7de402d880..dae7514ba09ee 100644
--- a/llvm/test/Transforms/Scalarizer/crash-bug.ll
+++ b/llvm/test/Transforms/Scalarizer/crash-bug.ll
@@ -22,7 +22,7 @@ bb3:
}
; See https://reviews.llvm.org/D83101#2135945
-define void @f1_crash(<2 x i16> %base, i1 %c, <2 x i16>* %ptr) {
+define void @f1_crash(<2 x i16> %base, i1 %c, ptr %ptr) {
; CHECK-LABEL: @f1_crash(
; CHECK: vector.ph:
; CHECK: %base.i0 = extractelement <2 x i16> %base, i32 0
@@ -31,7 +31,7 @@ define void @f1_crash(<2 x i16> %base, i1 %c, <2 x i16>* %ptr) {
; CHECK: vector.body115: ; preds = %vector.body115, %vector.ph
; CHECK: %vector.recur.i0 = phi i16 [ %base.i0, %vector.ph ], [ %wide.load125.i0, %vector.body115 ]
; CHECK: %vector.recur.i1 = phi i16 [ %base.i1, %vector.ph ], [ %wide.load125.i1, %vector.body115 ]
-; CHECK: %wide.load125 = load <2 x i16>, <2 x i16>* %ptr, align 1
+; CHECK: %wide.load125 = load <2 x i16>, ptr %ptr, align 1
; CHECK: %wide.load125.i0 = extractelement <2 x i16> %wide.load125, i32 0
; CHECK: %wide.load125.i1 = extractelement <2 x i16> %wide.load125, i32 1
; CHECK: br i1 %c, label %middle.block113, label %vector.body115
@@ -44,7 +44,7 @@ vector.ph:
vector.body115:
%vector.recur = phi <2 x i16> [ %base, %vector.ph ], [ %wide.load125, %vector.body115 ]
- %wide.load125 = load <2 x i16>, <2 x i16>* %ptr, align 1
+ %wide.load125 = load <2 x i16>, ptr %ptr, align 1
br i1 %c, label %middle.block113, label %vector.body115
middle.block113:
diff --git a/llvm/test/Transforms/Scalarizer/dbg-invariant.ll b/llvm/test/Transforms/Scalarizer/dbg-invariant.ll
index ff334ebae3957..f20eb869413ae 100644
--- a/llvm/test/Transforms/Scalarizer/dbg-invariant.ll
+++ b/llvm/test/Transforms/Scalarizer/dbg-invariant.ll
@@ -29,12 +29,12 @@
; Function Attrs: nofree norecurse nounwind
define dso_local void @foo() local_unnamed_addr #0 !dbg !7 {
entry:
- %0 = load <8 x i16>, <8 x i16>* bitcast ([8 x i16]* @d to <8 x i16>*), align 1
+ %0 = load <8 x i16>, ptr @d, align 1
call void @llvm.dbg.value(metadata i16 0, metadata !11, metadata !DIExpression()), !dbg !13
%1 = add <8 x i16> %0, <i16 28690, i16 28690, i16 28690, i16 28690, i16 28690, i16 28690, i16 28690, i16 28690>, !dbg !13
- store <8 x i16> %1, <8 x i16>* bitcast ([8 x i16]* @d to <8 x i16>*), align 1, !dbg !13
+ store <8 x i16> %1, ptr @d, align 1, !dbg !13
%2 = extractelement <8 x i16> %1, i32 7, !dbg !13
- store i16 %2, i16* @e, align 1, !dbg !13
+ store i16 %2, ptr @e, align 1, !dbg !13
ret void
}
diff --git a/llvm/test/Transforms/Scalarizer/dbginfo.ll b/llvm/test/Transforms/Scalarizer/dbginfo.ll
index 9c0c7ec3112f1..62871b4e8ff60 100644
--- a/llvm/test/Transforms/Scalarizer/dbginfo.ll
+++ b/llvm/test/Transforms/Scalarizer/dbginfo.ll
@@ -2,48 +2,45 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
; Function Attrs: nounwind uwtable
-define void @f1(<4 x i32>* nocapture %a, <4 x i32>* nocapture readonly %b, <4 x i32>* nocapture readonly %c) #0 !dbg !4 {
+define void @f1(ptr nocapture %a, ptr nocapture readonly %b, ptr nocapture readonly %c) #0 !dbg !4 {
; CHECK: @f1(
-; CHECK: %a.i0 = bitcast <4 x i32>* %a to i32*
-; CHECK: %a.i1 = getelementptr i32, i32* %a.i0, i32 1
-; CHECK: %a.i2 = getelementptr i32, i32* %a.i0, i32 2
-; CHECK: %a.i3 = getelementptr i32, i32* %a.i0, i32 3
-; CHECK: %c.i0 = bitcast <4 x i32>* %c to i32*
-; CHECK: %c.i1 = getelementptr i32, i32* %c.i0, i32 1
-; CHECK: %c.i2 = getelementptr i32, i32* %c.i0, i32 2
-; CHECK: %c.i3 = getelementptr i32, i32* %c.i0, i32 3
-; CHECK: %b.i0 = bitcast <4 x i32>* %b to i32*
-; CHECK: %b.i1 = getelementptr i32, i32* %b.i0, i32 1
-; CHECK: %b.i2 = getelementptr i32, i32* %b.i0, i32 2
-; CHECK: %b.i3 = getelementptr i32, i32* %b.i0, i32 3
-; CHECK: tail call void @llvm.dbg.value(metadata <4 x i32>* %a, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
-; CHECK: tail call void @llvm.dbg.value(metadata <4 x i32>* %b, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
-; CHECK: tail call void @llvm.dbg.value(metadata <4 x i32>* %c, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
-; CHECK: %bval.i0 = load i32, i32* %b.i0, align 16, !dbg ![[TAG1:[0-9]+]], !tbaa ![[TAG2:[0-9]+]]
-; CHECK: %bval.i1 = load i32, i32* %b.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: %bval.i2 = load i32, i32* %b.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: %bval.i3 = load i32, i32* %b.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: %cval.i0 = load i32, i32* %c.i0, align 16, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: %cval.i1 = load i32, i32* %c.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: %cval.i2 = load i32, i32* %c.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: %cval.i3 = load i32, i32* %c.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: %a.i1 = getelementptr i32, ptr %a, i32 1
+; CHECK: %a.i2 = getelementptr i32, ptr %a, i32 2
+; CHECK: %a.i3 = getelementptr i32, ptr %a, i32 3
+; CHECK: %c.i1 = getelementptr i32, ptr %c, i32 1
+; CHECK: %c.i2 = getelementptr i32, ptr %c, i32 2
+; CHECK: %c.i3 = getelementptr i32, ptr %c, i32 3
+; CHECK: %b.i1 = getelementptr i32, ptr %b, i32 1
+; CHECK: %b.i2 = getelementptr i32, ptr %b, i32 2
+; CHECK: %b.i3 = getelementptr i32, ptr %b, i32 3
+; CHECK: tail call void @llvm.dbg.value(metadata ptr %a, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
+; CHECK: tail call void @llvm.dbg.value(metadata ptr %b, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
+; CHECK: tail call void @llvm.dbg.value(metadata ptr %c, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}}
+; CHECK: %bval.i0 = load i32, ptr %b, align 16, !dbg ![[TAG1:[0-9]+]], !tbaa ![[TAG2:[0-9]+]]
+; CHECK: %bval.i1 = load i32, ptr %b.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: %bval.i2 = load i32, ptr %b.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: %bval.i3 = load i32, ptr %b.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: %cval.i0 = load i32, ptr %c, align 16, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: %cval.i1 = load i32, ptr %c.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: %cval.i2 = load i32, ptr %c.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: %cval.i3 = load i32, ptr %c.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
; CHECK: %add.i0 = add i32 %bval.i0, %cval.i0, !dbg ![[TAG1]]
; CHECK: %add.i1 = add i32 %bval.i1, %cval.i1, !dbg ![[TAG1]]
; CHECK: %add.i2 = add i32 %bval.i2, %cval.i2, !dbg ![[TAG1]]
; CHECK: %add.i3 = add i32 %bval.i3, %cval.i3, !dbg ![[TAG1]]
-; CHECK: store i32 %add.i0, i32* %a.i0, align 16, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: store i32 %add.i1, i32* %a.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: store i32 %add.i2, i32* %a.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]]
-; CHECK: store i32 %add.i3, i32* %a.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: store i32 %add.i0, ptr %a, align 16, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: store i32 %add.i1, ptr %a.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: store i32 %add.i2, ptr %a.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]]
+; CHECK: store i32 %add.i3, ptr %a.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]]
; CHECK: ret void
entry:
- tail call void @llvm.dbg.value(metadata <4 x i32>* %a, metadata !15, metadata !DIExpression()), !dbg !20
- tail call void @llvm.dbg.value(metadata <4 x i32>* %b, metadata !16, metadata !DIExpression()), !dbg !20
- tail call void @llvm.dbg.value(metadata <4 x i32>* %c, metadata !17, metadata !DIExpression()), !dbg !20
- %bval = load <4 x i32>, <4 x i32>* %b, align 16, !dbg !21, !tbaa !22
- %cval = load <4 x i32>, <4 x i32>* %c, align 16, !dbg !21, !tbaa !22
+ tail call void @llvm.dbg.value(metadata ptr %a, metadata !15, metadata !DIExpression()), !dbg !20
+ tail call void @llvm.dbg.value(metadata ptr %b, metadata !16, metadata !DIExpression()), !dbg !20
+ tail call void @llvm.dbg.value(metadata ptr %c, metadata !17, metadata !DIExpression()), !dbg !20
+ %bval = load <4 x i32>, ptr %b, align 16, !dbg !21, !tbaa !22
+ %cval = load <4 x i32>, ptr %c, align 16, !dbg !21, !tbaa !22
%add = add <4 x i32> %bval, %cval, !dbg !21
- store <4 x i32> %add, <4 x i32>* %a, align 16, !dbg !21, !tbaa !22
+ store <4 x i32> %add, ptr %a, align 16, !dbg !21, !tbaa !22
ret void, !dbg !25
}
diff --git a/llvm/test/Transforms/Scalarizer/global-bug-2.ll b/llvm/test/Transforms/Scalarizer/global-bug-2.ll
index 31eeb9de3fde8..4c6d8ec7f384c 100644
--- a/llvm/test/Transforms/Scalarizer/global-bug-2.ll
+++ b/llvm/test/Transforms/Scalarizer/global-bug-2.ll
@@ -12,8 +12,8 @@ entry:
br label %for.cond1
for.cond1: ; preds = %for.cond1, %entry
- %d.sroa.0.0 = phi <4 x i16*> [ <i16* @c.a, i16* @c.a, i16* @c.a, i16* @c.a>, %entry ], [ %d.sroa.0.1.vec.insert, %for.cond1 ]
- %d.sroa.0.0.vec.extract = extractelement <4 x i16*> %d.sroa.0.0, i32 0
- %d.sroa.0.1.vec.insert = shufflevector <4 x i16*> <i16* @c.a, i16* null, i16* undef, i16* undef>, <4 x i16*> %d.sroa.0.0, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
+ %d.sroa.0.0 = phi <4 x ptr> [ <ptr @c.a, ptr @c.a, ptr @c.a, ptr @c.a>, %entry ], [ %d.sroa.0.1.vec.insert, %for.cond1 ]
+ %d.sroa.0.0.vec.extract = extractelement <4 x ptr> %d.sroa.0.0, i32 0
+ %d.sroa.0.1.vec.insert = shufflevector <4 x ptr> <ptr @c.a, ptr null, ptr undef, ptr undef>, <4 x ptr> %d.sroa.0.0, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
br label %for.cond1
}
diff --git a/llvm/test/Transforms/Scalarizer/global-bug.ll b/llvm/test/Transforms/Scalarizer/global-bug.ll
index d3c3b1eeaba23..5aa6da0df4d83 100644
--- a/llvm/test/Transforms/Scalarizer/global-bug.ll
+++ b/llvm/test/Transforms/Scalarizer/global-bug.ll
@@ -11,13 +11,13 @@
define dso_local void @test1() local_unnamed_addr {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[T0:%.*]] = ptrtoint i16* @a to i16
-; CHECK-NEXT: store i16 [[T0]], i16* @b, align 1
+; CHECK-NEXT: [[T0:%.*]] = ptrtoint ptr @a to i16
+; CHECK-NEXT: store i16 [[T0]], ptr @b, align 1
; CHECK-NEXT: ret void
;
entry:
- %extract = extractelement <4 x i16*> <i16* @a, i16* @a, i16* @a, i16* @a>, i32 1
- %t0 = ptrtoint i16* %extract to i16
- store i16 %t0, i16* @b, align 1
+ %extract = extractelement <4 x ptr> <ptr @a, ptr @a, ptr @a, ptr @a>, i32 1
+ %t0 = ptrtoint ptr %extract to i16
+ store i16 %t0, ptr @b, align 1
ret void
}
diff --git a/llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll b/llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
index d700858b15083..fd50b1bcec295 100644
--- a/llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
+++ b/llvm/test/Transforms/Scalarizer/phi-unreachable-pred.ll
@@ -6,7 +6,7 @@ define i16 @f1() {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x i16> [[INSERT]], i16 ptrtoint (i16 ()* @f1 to i16), i32 0
+; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x i16> [[INSERT]], i16 ptrtoint (ptr @f1 to i16), i32 0
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: br i1 undef, label [[FOR_BODY:%.*]], label [[FOR_END]]
@@ -18,7 +18,7 @@ entry:
br label %for.end
for.body:
- %insert = insertelement <4 x i16> %insert, i16 ptrtoint (i16 () * @f1 to i16), i32 0
+ %insert = insertelement <4 x i16> %insert, i16 ptrtoint (ptr @f1 to i16), i32 0
br label %for.cond
for.cond:
diff --git a/llvm/test/Transforms/Scalarizer/scatter-order.ll b/llvm/test/Transforms/Scalarizer/scatter-order.ll
index 36c62c5c86458..0348c4e289bdd 100644
--- a/llvm/test/Transforms/Scalarizer/scatter-order.ll
+++ b/llvm/test/Transforms/Scalarizer/scatter-order.ll
@@ -59,17 +59,16 @@ define <2 x i32> @test3(<2 x i32> %i, <2 x i32> %j) {
ret <2 x i32> %res
}
-define void @test4(<2 x i32>* %ptr, <2 x i32> %val) {
+define void @test4(ptr %ptr, <2 x i32> %val) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: [[VAL_I0:%.*]] = extractelement <2 x i32> [[VAL:%.*]], i32 0
-; CHECK-NEXT: [[PTR_I0:%.*]] = bitcast <2 x i32>* [[PTR:%.*]] to i32*
-; CHECK-NEXT: store i32 [[VAL_I0]], i32* [[PTR_I0]], align 8
+; CHECK-NEXT: store i32 [[VAL_I0]], ptr [[PTR:%.*]], align 8
; CHECK-NEXT: [[VAL_I1:%.*]] = extractelement <2 x i32> [[VAL]], i32 1
-; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr i32, i32* [[PTR_I0]], i32 1
-; CHECK-NEXT: store i32 [[VAL_I1]], i32* [[PTR_I1]], align 4
+; CHECK-NEXT: [[PTR_I1:%.*]] = getelementptr i32, ptr [[PTR:%.*]], i32 1
+; CHECK-NEXT: store i32 [[VAL_I1]], ptr [[PTR_I1]], align 4
; CHECK-NEXT: ret void
;
- store <2 x i32> %val, <2 x i32> *%ptr
+ store <2 x i32> %val, ptr %ptr
ret void
}
diff --git a/llvm/test/Transforms/Scalarizer/store-bug.ll b/llvm/test/Transforms/Scalarizer/store-bug.ll
index 0793cb402fc5a..1fccdc624e493 100644
--- a/llvm/test/Transforms/Scalarizer/store-bug.ll
+++ b/llvm/test/Transforms/Scalarizer/store-bug.ll
@@ -6,20 +6,20 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
;
; Any regressions should trigger an assert in the scalarizer.
-define void @func(<4 x float> %val, <4 x float> *%ptr) {
- store <4 x float> %val, <4 x float> *%ptr
+define void @func(<4 x float> %val, ptr %ptr) {
+ store <4 x float> %val, ptr %ptr
ret void
-; CHECK: store float %val.i0, float* %ptr.i0, align 16
-; CHECK: store float %val.i1, float* %ptr.i1, align 4
-; CHECK: store float %val.i2, float* %ptr.i2, align 8
-; CHECK: store float %val.i3, float* %ptr.i3, align 4
+; CHECK: store float %val.i0, ptr %ptr, align 16
+; CHECK: store float %val.i1, ptr %ptr.i1, align 4
+; CHECK: store float %val.i2, ptr %ptr.i2, align 8
+; CHECK: store float %val.i3, ptr %ptr.i3, align 4
}
-define void @func.copy(<4 x float> %val, <4 x float> *%ptr) {
- store <4 x float> %val, <4 x float> *%ptr
+define void @func.copy(<4 x float> %val, ptr %ptr) {
+ store <4 x float> %val, ptr %ptr
ret void
-; CHECK: store float %val.i0, float* %ptr.i0, align 16
-; CHECK: store float %val.i1, float* %ptr.i1, align 4
-; CHECK: store float %val.i2, float* %ptr.i2, align 8
-; CHECK: store float %val.i3, float* %ptr.i3, align 4
+; CHECK: store float %val.i0, ptr %ptr, align 16
+; CHECK: store float %val.i1, ptr %ptr.i1, align 4
+; CHECK: store float %val.i2, ptr %ptr.i2, align 8
+; CHECK: store float %val.i3, ptr %ptr.i3, align 4
}
diff --git a/llvm/test/Transforms/Scalarizer/variable-extractelement.ll b/llvm/test/Transforms/Scalarizer/variable-extractelement.ll
index 9374f869a23d3..e3fcab79f7ca0 100644
--- a/llvm/test/Transforms/Scalarizer/variable-extractelement.ll
+++ b/llvm/test/Transforms/Scalarizer/variable-extractelement.ll
@@ -30,9 +30,9 @@ define i32 @f1(<4 x i32> %src, i32 %index) {
ret i32 %res
}
-define i32 @f2(<4 x i32> *%src, i32 %index) {
+define i32 @f2(ptr %src, i32 %index) {
; DEFAULT-LABEL: @f2(
-; DEFAULT-NEXT: [[VAL0:%.*]] = load <4 x i32>, <4 x i32>* [[SRC:%.*]], align 16
+; DEFAULT-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr [[SRC:%.*]], align 16
; DEFAULT-NEXT: [[VAL0_I0:%.*]] = extractelement <4 x i32> [[VAL0]], i32 0
; DEFAULT-NEXT: [[VAL1_I0:%.*]] = shl i32 1, [[VAL0_I0]]
; DEFAULT-NEXT: [[VAL0_I1:%.*]] = extractelement <4 x i32> [[VAL0]], i32 1
@@ -52,7 +52,7 @@ define i32 @f2(<4 x i32> *%src, i32 %index) {
; DEFAULT-NEXT: ret i32 [[VAL2]]
;
; OFF-LABEL: @f2(
-; OFF-NEXT: [[VAL0:%.*]] = load <4 x i32>, <4 x i32>* [[SRC:%.*]], align 16
+; OFF-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr [[SRC:%.*]], align 16
; OFF-NEXT: [[VAL0_I0:%.*]] = extractelement <4 x i32> [[VAL0]], i32 0
; OFF-NEXT: [[VAL1_I0:%.*]] = shl i32 1, [[VAL0_I0]]
; OFF-NEXT: [[VAL0_I1:%.*]] = extractelement <4 x i32> [[VAL0]], i32 1
@@ -68,7 +68,7 @@ define i32 @f2(<4 x i32> *%src, i32 %index) {
; OFF-NEXT: [[VAL2:%.*]] = extractelement <4 x i32> [[VAL1]], i32 [[INDEX:%.*]]
; OFF-NEXT: ret i32 [[VAL2]]
;
- %val0 = load <4 x i32> , <4 x i32> *%src
+ %val0 = load <4 x i32> , ptr %src
%val1 = shl <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %val0
%val2 = extractelement <4 x i32> %val1, i32 %index
ret i32 %val2
diff --git a/llvm/test/Transforms/Scalarizer/variable-insertelement.ll b/llvm/test/Transforms/Scalarizer/variable-insertelement.ll
index c757d2c7f9c7c..115d9a32701bc 100644
--- a/llvm/test/Transforms/Scalarizer/variable-insertelement.ll
+++ b/llvm/test/Transforms/Scalarizer/variable-insertelement.ll
@@ -34,9 +34,9 @@ define <4 x i32> @f1(<4 x i32> %src, i32 %val, i32 %index) {
ret <4 x i32> %res
}
-define void @f2(<4 x i32> *%dest, <4 x i32> *%src, i32 %index) {
+define void @f2(ptr %dest, ptr %src, i32 %index) {
; DEFAULT-LABEL: @f2(
-; DEFAULT-NEXT: [[VAL0:%.*]] = load <4 x i32>, <4 x i32>* [[SRC:%.*]], align 16
+; DEFAULT-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr [[SRC:%.*]], align 16
; DEFAULT-NEXT: [[INDEX_IS_0:%.*]] = icmp eq i32 [[INDEX:%.*]], 0
; DEFAULT-NEXT: [[VAL0_I0:%.*]] = extractelement <4 x i32> [[VAL0]], i32 0
; DEFAULT-NEXT: [[VAL1_I0:%.*]] = select i1 [[INDEX_IS_0]], i32 1, i32 [[VAL0_I0]]
@@ -57,11 +57,11 @@ define void @f2(<4 x i32> *%dest, <4 x i32> *%src, i32 %index) {
; DEFAULT-NEXT: [[VAL2_UPTO1:%.*]] = insertelement <4 x i32> [[VAL2_UPTO0]], i32 [[VAL2_I1]], i32 1
; DEFAULT-NEXT: [[VAL2_UPTO2:%.*]] = insertelement <4 x i32> [[VAL2_UPTO1]], i32 [[VAL2_I2]], i32 2
; DEFAULT-NEXT: [[VAL2:%.*]] = insertelement <4 x i32> [[VAL2_UPTO2]], i32 [[VAL2_I3]], i32 3
-; DEFAULT-NEXT: store <4 x i32> [[VAL2]], <4 x i32>* [[DEST:%.*]], align 16
+; DEFAULT-NEXT: store <4 x i32> [[VAL2]], ptr [[DEST:%.*]], align 16
; DEFAULT-NEXT: ret void
;
; OFF-LABEL: @f2(
-; OFF-NEXT: [[VAL0:%.*]] = load <4 x i32>, <4 x i32>* [[SRC:%.*]], align 16
+; OFF-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr [[SRC:%.*]], align 16
; OFF-NEXT: [[VAL1:%.*]] = insertelement <4 x i32> [[VAL0]], i32 1, i32 [[INDEX:%.*]]
; OFF-NEXT: [[VAL1_I0:%.*]] = extractelement <4 x i32> [[VAL1]], i32 0
; OFF-NEXT: [[VAL2_I0:%.*]] = shl i32 1, [[VAL1_I0]]
@@ -75,12 +75,12 @@ define void @f2(<4 x i32> *%dest, <4 x i32> *%src, i32 %index) {
; OFF-NEXT: [[VAL2_UPTO1:%.*]] = insertelement <4 x i32> [[VAL2_UPTO0]], i32 [[VAL2_I1]], i32 1
; OFF-NEXT: [[VAL2_UPTO2:%.*]] = insertelement <4 x i32> [[VAL2_UPTO1]], i32 [[VAL2_I2]], i32 2
; OFF-NEXT: [[VAL2:%.*]] = insertelement <4 x i32> [[VAL2_UPTO2]], i32 [[VAL2_I3]], i32 3
-; OFF-NEXT: store <4 x i32> [[VAL2]], <4 x i32>* [[DEST:%.*]], align 16
+; OFF-NEXT: store <4 x i32> [[VAL2]], ptr [[DEST:%.*]], align 16
; OFF-NEXT: ret void
;
- %val0 = load <4 x i32> , <4 x i32> *%src
+ %val0 = load <4 x i32> , ptr %src
%val1 = insertelement <4 x i32> %val0, i32 1, i32 %index
%val2 = shl <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %val1
- store <4 x i32> %val2, <4 x i32> *%dest
+ store <4 x i32> %val2, ptr %dest
ret void
}
diff --git a/llvm/test/Transforms/Scalarizer/vector-of-pointer-to-vector.ll b/llvm/test/Transforms/Scalarizer/vector-of-pointer-to-vector.ll
index 53de328a060d0..9b90def047b65 100644
--- a/llvm/test/Transforms/Scalarizer/vector-of-pointer-to-vector.ll
+++ b/llvm/test/Transforms/Scalarizer/vector-of-pointer-to-vector.ll
@@ -2,98 +2,92 @@
; RUN: opt %s -passes='function(scalarizer,dce)' -scalarize-load-store -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-define <1 x i32> @f1(<1 x <1 x i32>*> %src, i32 %index) {
+define <1 x i32> @f1(<1 x ptr> %src, i32 %index) {
; CHECK-LABEL: @f1(
; CHECK-NEXT: [[INDEX_IS_0:%.*]] = icmp eq i32 [[INDEX:%.*]], 0
-; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x <1 x i32>*> [[SRC:%.*]], i32 0
-; CHECK-NEXT: [[DOTUPTO0:%.*]] = select i1 [[INDEX_IS_0]], <1 x i32>* [[SRC_I0]], <1 x i32>* undef
-; CHECK-NEXT: [[DOTUPTO0_I0:%.*]] = bitcast <1 x i32>* [[DOTUPTO0]] to i32*
-; CHECK-NEXT: [[DOTI0:%.*]] = load i32, i32* [[DOTUPTO0_I0]], align 4
+; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x ptr> [[SRC:%.*]], i32 0
+; CHECK-NEXT: [[DOTUPTO0:%.*]] = select i1 [[INDEX_IS_0]], ptr [[SRC_I0]], ptr undef
+; CHECK-NEXT: [[DOTI0:%.*]] = load i32, ptr [[DOTUPTO0]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <1 x i32> poison, i32 [[DOTI0]], i32 0
; CHECK-NEXT: ret <1 x i32> [[TMP1]]
;
- %1 = extractelement <1 x <1 x i32>*> %src, i32 %index
- %2 = load <1 x i32>, <1 x i32>* %1, align 4
+ %1 = extractelement <1 x ptr> %src, i32 %index
+ %2 = load <1 x i32>, ptr %1, align 4
ret <1 x i32> %2
}
-define <1 x i32> @f1b(<1 x <1 x i32>*> %src) {
+define <1 x i32> @f1b(<1 x ptr> %src) {
; CHECK-LABEL: @f1b(
-; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x <1 x i32>*> [[SRC:%.*]], i32 0
-; CHECK-NEXT: [[SRC_I0_I0:%.*]] = bitcast <1 x i32>* [[SRC_I0]] to i32*
-; CHECK-NEXT: [[DOTI0:%.*]] = load i32, i32* [[SRC_I0_I0]], align 4
+; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x ptr> [[SRC:%.*]], i32 0
+; CHECK-NEXT: [[DOTI0:%.*]] = load i32, ptr [[SRC_I0]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <1 x i32> poison, i32 [[DOTI0]], i32 0
; CHECK-NEXT: ret <1 x i32> [[TMP1]]
;
- %1 = extractelement <1 x <1 x i32>*> %src, i32 0
- %2 = load <1 x i32>, <1 x i32>* %1, align 4
+ %1 = extractelement <1 x ptr> %src, i32 0
+ %2 = load <1 x i32>, ptr %1, align 4
ret <1 x i32> %2
}
-define <2 x i32> @f2(<1 x <2 x i32>*> %src, i32 %index) {
+define <2 x i32> @f2(<1 x ptr> %src, i32 %index) {
; CHECK-LABEL: @f2(
; CHECK-NEXT: [[INDEX_IS_0:%.*]] = icmp eq i32 [[INDEX:%.*]], 0
-; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x <2 x i32>*> [[SRC:%.*]], i32 0
-; CHECK-NEXT: [[DOTUPTO0:%.*]] = select i1 [[INDEX_IS_0]], <2 x i32>* [[SRC_I0]], <2 x i32>* undef
-; CHECK-NEXT: [[DOTUPTO0_I0:%.*]] = bitcast <2 x i32>* [[DOTUPTO0]] to i32*
-; CHECK-NEXT: [[DOTUPTO0_I1:%.*]] = getelementptr i32, i32* [[DOTUPTO0_I0]], i32 1
-; CHECK-NEXT: [[DOTI0:%.*]] = load i32, i32* [[DOTUPTO0_I0]], align 4
-; CHECK-NEXT: [[DOTI1:%.*]] = load i32, i32* [[DOTUPTO0_I1]], align 4
+; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x ptr> [[SRC:%.*]], i32 0
+; CHECK-NEXT: [[DOTUPTO0:%.*]] = select i1 [[INDEX_IS_0]], ptr [[SRC_I0]], ptr undef
+; CHECK-NEXT: [[DOTUPTO0_I1:%.*]] = getelementptr i32, ptr [[DOTUPTO0]], i32 1
+; CHECK-NEXT: [[DOTI0:%.*]] = load i32, ptr [[DOTUPTO0]], align 4
+; CHECK-NEXT: [[DOTI1:%.*]] = load i32, ptr [[DOTUPTO0_I1]], align 4
; CHECK-NEXT: [[DOTUPTO01:%.*]] = insertelement <2 x i32> poison, i32 [[DOTI0]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[DOTUPTO01]], i32 [[DOTI1]], i32 1
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
- %1 = extractelement <1 x <2 x i32>*> %src, i32 %index
- %2 = load <2 x i32>, <2 x i32>* %1, align 4
+ %1 = extractelement <1 x ptr> %src, i32 %index
+ %2 = load <2 x i32>, ptr %1, align 4
ret <2 x i32> %2
}
-define <2 x i32> @f2b(<1 x <2 x i32>*> %src) {
+define <2 x i32> @f2b(<1 x ptr> %src) {
; CHECK-LABEL: @f2b(
-; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x <2 x i32>*> [[SRC:%.*]], i32 0
-; CHECK-NEXT: [[SRC_I0_I0:%.*]] = bitcast <2 x i32>* [[SRC_I0]] to i32*
-; CHECK-NEXT: [[SRC_I0_I1:%.*]] = getelementptr i32, i32* [[SRC_I0_I0]], i32 1
-; CHECK-NEXT: [[DOTI0:%.*]] = load i32, i32* [[SRC_I0_I0]], align 4
-; CHECK-NEXT: [[DOTI1:%.*]] = load i32, i32* [[SRC_I0_I1]], align 4
+; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x ptr> [[SRC:%.*]], i32 0
+; CHECK-NEXT: [[SRC_I0_I1:%.*]] = getelementptr i32, ptr [[SRC_I0]], i32 1
+; CHECK-NEXT: [[DOTI0:%.*]] = load i32, ptr [[SRC_I0]], align 4
+; CHECK-NEXT: [[DOTI1:%.*]] = load i32, ptr [[SRC_I0_I1]], align 4
; CHECK-NEXT: [[DOTUPTO0:%.*]] = insertelement <2 x i32> poison, i32 [[DOTI0]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[DOTUPTO0]], i32 [[DOTI1]], i32 1
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
- %1 = extractelement <1 x <2 x i32>*> %src, i32 0
- %2 = load <2 x i32>, <2 x i32>* %1, align 4
+ %1 = extractelement <1 x ptr> %src, i32 0
+ %2 = load <2 x i32>, ptr %1, align 4
ret <2 x i32> %2
}
-define void @f3(<1 x <2 x i32>*> %src, i32 %index, <2 x i32> %val) {
+define void @f3(<1 x ptr> %src, i32 %index, <2 x i32> %val) {
; CHECK-LABEL: @f3(
; CHECK-NEXT: [[VAL_I0:%.*]] = extractelement <2 x i32> [[VAL:%.*]], i32 0
; CHECK-NEXT: [[VAL_I1:%.*]] = extractelement <2 x i32> [[VAL]], i32 1
; CHECK-NEXT: [[INDEX_IS_0:%.*]] = icmp eq i32 [[INDEX:%.*]], 0
-; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x <2 x i32>*> [[SRC:%.*]], i32 0
-; CHECK-NEXT: [[DOTUPTO0:%.*]] = select i1 [[INDEX_IS_0]], <2 x i32>* [[SRC_I0]], <2 x i32>* undef
-; CHECK-NEXT: [[DOTUPTO0_I0:%.*]] = bitcast <2 x i32>* [[DOTUPTO0]] to i32*
-; CHECK-NEXT: [[DOTUPTO0_I1:%.*]] = getelementptr i32, i32* [[DOTUPTO0_I0]], i32 1
-; CHECK-NEXT: store i32 [[VAL_I0]], i32* [[DOTUPTO0_I0]], align 4
-; CHECK-NEXT: store i32 [[VAL_I1]], i32* [[DOTUPTO0_I1]], align 4
+; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x ptr> [[SRC:%.*]], i32 0
+; CHECK-NEXT: [[DOTUPTO0:%.*]] = select i1 [[INDEX_IS_0]], ptr [[SRC_I0]], ptr undef
+; CHECK-NEXT: [[DOTUPTO0_I1:%.*]] = getelementptr i32, ptr [[DOTUPTO0]], i32 1
+; CHECK-NEXT: store i32 [[VAL_I0]], ptr [[DOTUPTO0]], align 4
+; CHECK-NEXT: store i32 [[VAL_I1]], ptr [[DOTUPTO0_I1]], align 4
; CHECK-NEXT: ret void
;
- %1 = extractelement <1 x <2 x i32>*> %src, i32 %index
- store <2 x i32> %val, <2 x i32>* %1, align 4
+ %1 = extractelement <1 x ptr> %src, i32 %index
+ store <2 x i32> %val, ptr %1, align 4
ret void
}
-define void @f3b(<1 x <2 x i32>*> %src, <2 x i32> %val) {
+define void @f3b(<1 x ptr> %src, <2 x i32> %val) {
; CHECK-LABEL: @f3b(
; CHECK-NEXT: [[VAL_I0:%.*]] = extractelement <2 x i32> [[VAL:%.*]], i32 0
; CHECK-NEXT: [[VAL_I1:%.*]] = extractelement <2 x i32> [[VAL]], i32 1
-; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x <2 x i32>*> [[SRC:%.*]], i32 0
-; CHECK-NEXT: [[SRC_I0_I0:%.*]] = bitcast <2 x i32>* [[SRC_I0]] to i32*
-; CHECK-NEXT: [[SRC_I0_I1:%.*]] = getelementptr i32, i32* [[SRC_I0_I0]], i32 1
-; CHECK-NEXT: store i32 [[VAL_I0]], i32* [[SRC_I0_I0]], align 4
-; CHECK-NEXT: store i32 [[VAL_I1]], i32* [[SRC_I0_I1]], align 4
+; CHECK-NEXT: [[SRC_I0:%.*]] = extractelement <1 x ptr> [[SRC:%.*]], i32 0
+; CHECK-NEXT: [[SRC_I0_I1:%.*]] = getelementptr i32, ptr [[SRC_I0]], i32 1
+; CHECK-NEXT: store i32 [[VAL_I0]], ptr [[SRC_I0]], align 4
+; CHECK-NEXT: store i32 [[VAL_I1]], ptr [[SRC_I0_I1]], align 4
; CHECK-NEXT: ret void
;
- %1 = extractelement <1 x <2 x i32>*> %src, i32 0
- store <2 x i32> %val, <2 x i32>* %1, align 4
+ %1 = extractelement <1 x ptr> %src, i32 0
+ store <2 x i32> %val, ptr %1, align 4
ret void
}
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