[llvm] a94a855 - [LoopVectorize] Add missing test for D133687

[Igor Kirillov via llvm-commits]

Author: Igor Kirillov
Date: 2022-10-03T14:54:17+01:00
New Revision: a94a85552c9cadabeb921cd38e1eaf2c4cc8807e

URL: https://github.com/llvm/llvm-project/commit/a94a85552c9cadabeb921cd38e1eaf2c4cc8807e
DIFF: https://github.com/llvm/llvm-project/commit/a94a85552c9cadabeb921cd38e1eaf2c4cc8807e.diff

LOG: [LoopVectorize] Add missing test for D133687

Added: 
    

Modified: 
    llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll b/llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
index 137d9035d8f5d..f6132cfaf67bb 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
@@ -535,3 +535,28 @@ for.body:
 exit:
   ret void
 }
+
+; Make sure we can vectorize loop with a non-reduction value stored to an
+; invariant address that is calculated inside loop.
+define i32 @non_reduc_store_invariant_addr_not_hoisted(i32* %dst, i32* readonly %src) {
+; CHECK-LABEL: @non_reduc_store_invariant_addr_not_hoisted
+; CHECK: vector.body:
+entry:
+  br label %for.body
+
+for.body:                                         ; preds = %for.body, %entry
+  %sum = phi i32 [ 0, %entry ], [ %add, %for.body ]
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %gep.src = getelementptr inbounds i32, i32* %src, i64 %iv
+  %0 = load i32, i32* %gep.src, align 4
+  %add = add nsw i32 %sum, %0
+  %gep.dst = getelementptr inbounds i32, i32* %dst, i64 42
+  store i32 0, i32* %gep.dst, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %exit, label %for.body
+
+exit:                                             ; preds = %for.body
+  %add.lcssa = phi i32 [ %add, %for.body ]
+  ret i32 %add.lcssa
+}