[llvm] 24553df - [GlobalISel] Combine `undef / X -> 0` and `undef % X -> 0`
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 1 13:49:21 PDT 2022
Author: Jessica Paquette
Date: 2022-10-01T13:48:55-07:00
New Revision: 24553df57dcc7bb2567697d8697b37ffbbac0bac
URL: https://github.com/llvm/llvm-project/commit/24553df57dcc7bb2567697d8697b37ffbbac0bac
DIFF: https://github.com/llvm/llvm-project/commit/24553df57dcc7bb2567697d8697b37ffbbac0bac.diff
LOG: [GlobalISel] Combine `undef / X -> 0` and `undef % X -> 0`
This fixes the `urem_undef_lhs` case in the following:
https://gcc.godbolt.org/z/Wo9x7o679
Also see https://github.com/llvm/llvm-project/issues/57256 for more related
bugs.
This is equivalent to the undef bits in `simplifyDivRem` in the DAGCombiner.
Differential Revision: https://reviews.llvm.org/D135020
Added:
llvm/test/CodeGen/AArch64/GlobalISel/combine-binop-undef-left-to-zero.mir
Modified:
llvm/include/llvm/Target/GlobalISel/Combine.td
Removed:
llvm/test/CodeGen/AArch64/GlobalISel/combine-shl.mir
################################################################################
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index b5057646c85e4..add2cd704329d 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -231,7 +231,7 @@ def undef_to_negative_one: GICombineRule<
def binop_left_undef_to_zero: GICombineRule<
(defs root:$root),
- (match (wip_match_opcode G_SHL):$root,
+ (match (wip_match_opcode G_SHL, G_UDIV, G_UREM):$root,
[{ return Helper.matchOperandIsUndef(*${root}, 1); }]),
(apply [{ Helper.replaceInstWithConstant(*${root}, 0); }])>;
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-binop-undef-left-to-zero.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-binop-undef-left-to-zero.mir
new file mode 100644
index 0000000000000..e7ddda957a54f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-binop-undef-left-to-zero.mir
@@ -0,0 +1,94 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s
+---
+name: test_combine_shl_undef_x_s32
+body: |
+ bb.1:
+ liveins: $w0
+ ; CHECK-LABEL: name: test_combine_shl_undef_x_s32
+ ; CHECK: liveins: $w0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+ %0:_(s32) = COPY $w0
+ %1:_(s32) = G_IMPLICIT_DEF
+ %2:_(s32) = G_SHL %1(s32), %0(s32)
+ $w0 = COPY %2(s32)
+...
+---
+name: test_combine_shl_undef_x_v2s32
+body: |
+ bb.1:
+ liveins: $d0
+ ; CHECK-LABEL: name: test_combine_shl_undef_x_v2s32
+ ; CHECK: liveins: $d0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<2 x s32>)
+ %0:_(<2 x s32>) = COPY $d0
+ %1:_(<2 x s32>) = G_IMPLICIT_DEF
+ %2:_(<2 x s32>) = G_SHL %1(<2 x s32>), %0(<2 x s32>)
+ $d0 = COPY %2(<2 x s32>)
+...
+---
+name: udiv_scalar
+body: |
+ bb.1:
+ liveins: $w0
+ ; CHECK-LABEL: name: udiv_scalar
+ ; CHECK: liveins: $w0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: %op:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY %op(s32)
+ %rhs:_(s32) = COPY $w0
+ %undef:_(s32) = G_IMPLICIT_DEF
+ %op:_(s32) = G_UDIV %undef(s32), %rhs(s32)
+ $w0 = COPY %op(s32)
+...
+---
+name: udiv_vector
+body: |
+ bb.1:
+ liveins: $d0
+ ; CHECK-LABEL: name: udiv_vector
+ ; CHECK: liveins: $d0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: %op:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; CHECK-NEXT: $d0 = COPY %op(<2 x s32>)
+ %rhs:_(<2 x s32>) = COPY $d0
+ %undef:_(<2 x s32>) = G_IMPLICIT_DEF
+ %op:_(<2 x s32>) = G_UDIV %undef(<2 x s32>), %rhs(<2 x s32>)
+ $d0 = COPY %op(<2 x s32>)
+...
+---
+name: urem_scalar
+body: |
+ bb.1:
+ liveins: $w0
+ ; CHECK-LABEL: name: urem_scalar
+ ; CHECK: liveins: $w0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: %op:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY %op(s32)
+ %rhs:_(s32) = COPY $w0
+ %undef:_(s32) = G_IMPLICIT_DEF
+ %op:_(s32) = G_UREM %undef(s32), %rhs(s32)
+ $w0 = COPY %op(s32)
+...
+---
+name: urem_vector
+body: |
+ bb.1:
+ liveins: $d0
+ ; CHECK-LABEL: name: urem_vector
+ ; CHECK: liveins: $d0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: %op:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; CHECK-NEXT: $d0 = COPY %op(<2 x s32>)
+ %rhs:_(<2 x s32>) = COPY $d0
+ %undef:_(<2 x s32>) = G_IMPLICIT_DEF
+ %op:_(<2 x s32>) = G_UREM %undef(<2 x s32>), %rhs(<2 x s32>)
+ $d0 = COPY %op(<2 x s32>)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-shl.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-shl.mir
deleted file mode 100644
index fe75f9965bc90..0000000000000
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-shl.mir
+++ /dev/null
@@ -1,29 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s
----
-name: test_combine_shl_undef_x_s32
-body: |
- bb.1:
- liveins: $w0
- ; CHECK-LABEL: name: test_combine_shl_undef_x_s32
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK: $w0 = COPY [[C]](s32)
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_SHL %1(s32), %0(s32)
- $w0 = COPY %2(s32)
-...
----
-name: test_combine_shl_undef_x_v2s32
-body: |
- bb.1:
- liveins: $d0
- ; CHECK-LABEL: name: test_combine_shl_undef_x_v2s32
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
- ; CHECK: $d0 = COPY [[BUILD_VECTOR]](<2 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = G_IMPLICIT_DEF
- %2:_(<2 x s32>) = G_SHL %1(<2 x s32>), %0(<2 x s32>)
- $d0 = COPY %2(<2 x s32>)
-...
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