[PATCH] D134600: [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: lld/ELF/Arch/RISCV.cpp:377
   case R_RISCV_JAL: {
+    if (config->riscvTbljal && (read16le(loc) & 0xfc03) == 0xa002)
+      return;
----------------
This seems wrong


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Comment at: lld/ELF/Arch/RISCV.cpp:813
+            if (config->riscvTbljal &&
+                (aux.writes[writesIdx] & 0xfc03) == 0xa002) {
+              skip = 2;
----------------
This seems like poor design, you shouldn't be using R_RISCV_JAL once it's no longer a JAL instruction there


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Comment at: lld/ELF/SyntheticSections.cpp:1213
+      const auto jalr = sec.data()[r.offset + 4];
+      const uint8_t rd = (jalr & ((1ULL << (11 + 1)) - 1)) >> 7;
+      if (rd == 0)
----------------
When moving this to RISCV.cpp please use extractBits


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Comment at: lld/ELF/Writer.cpp:1637
 
+  // scan all R_RISCV_CALL/R_RISCV_CALL_PLT for RISCV Zcmt Jump table.
+  if (in.riscvTableJumpSection) {
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Why isn't this done when we read in the relocations the first time?


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Comment at: lld/ELF/Writer.cpp:2859
+      if (config->emachine == EM_RISCV && config->riscvTbljal)
+        in.riscvTableJumpSection->writeTo(Out::bufferStart + sec->offset);
+    }
----------------
Huh? This doesn't make any sense? You're just writing the jump table section on top of every SHF_ALLOC output section? Make it act like every single other synthetic section and end up in an output section.


Repository:
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  https://reviews.llvm.org/D134600/new/

https://reviews.llvm.org/D134600