[llvm] 0caa9d4 - AArch64: Don't use RETA[AB] when ShadowCallStack is enabled.

[Peter Collingbourne via llvm-commits]

Author: Peter Collingbourne
Date: 2022-09-30T12:33:23-07:00
New Revision: 0caa9d4b1e35ed3d7a2ef42fb1ae50916312a006

URL: https://github.com/llvm/llvm-project/commit/0caa9d4b1e35ed3d7a2ef42fb1ae50916312a006
DIFF: https://github.com/llvm/llvm-project/commit/0caa9d4b1e35ed3d7a2ef42fb1ae50916312a006.diff

LOG: AArch64: Don't use RETA[AB] when ShadowCallStack is enabled.

When returning from a function with both SCS and PAC-RET enabled, we need to
authenticate the return address from the stack and then load from the SCS,
but this was happening in the reverse order when RETA[AB] were being used.
Fix it by disabling the use of RETA[AB] when SCS is enabled.

Fixes pr58072.

Differential Revision: https://reviews.llvm.org/D134931

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    llvm/test/CodeGen/AArch64/sign-return-address.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 09c243ada305d..b1776f027e4e6 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -1864,8 +1864,9 @@ static void InsertReturnAddressAuth(MachineFunction &MF,
   // From v8.3a onwards there are optimised authenticate LR and return
   // instructions, namely RETA{A,B}, that can be used instead. In this case the
   // DW_CFA_AARCH64_negate_ra_state can't be emitted.
-  if (Subtarget.hasPAuth() && MBBI != MBB.end() &&
-      MBBI->getOpcode() == AArch64::RET_ReallyLR) {
+  if (Subtarget.hasPAuth() &&
+      !MF.getFunction().hasFnAttribute(Attribute::ShadowCallStack) &&
+      MBBI != MBB.end() && MBBI->getOpcode() == AArch64::RET_ReallyLR) {
     BuildMI(MBB, MBBI, DL,
             TII->get(MFI.shouldSignWithBKey() ? AArch64::RETAB : AArch64::RETAA))
         .copyImplicitOps(*MBBI);

diff  --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll
index 30a2647a0702d..bc6d86ab073f1 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll
@@ -79,6 +79,13 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf"  {
   ret i32 %call
 }
 
+; CHECK-LABEL: @non_leaf_scs
+; CHECK-NOT:   retaa
+define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstack "target-features"="+v8.3a,+reserve-x18"  {
+  %call = call i32 @foo(i32 %x)
+  ret i32 %call
+}
+
 ; CHECK-LABEL: @leaf_sign_all_v83
 ; CHECK:        pacia x30, sp
 ; CHECK-NEXT:  .cfi_negate_ra_state