[PATCH] D133584: [DAGCombiner] [AMDGPU] Allow vector loads in MatchLoadCombine

Jeffrey Byrnes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 30 12:10:38 PDT 2022


jrbyrnes updated this revision to Diff 464357.
jrbyrnes added a comment.

Extend ByteProvider / VectorOffset handling to support vectorScalarTypes > 1 Byte.

Additional comments, tests


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133584/new/

https://reviews.llvm.org/D133584

Files:
  llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/load-combine.ll
  llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
  llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
  llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll

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