[PATCH] D98101: [RISCV] Enable the LocalStackSlotAllocation pass support

luxufan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 30 08:48:40 PDT 2022


StephenFan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:332
+
+  // Assume 128 bytes spill slots size to estimate the maximum possible 
+  // offset relative to the stack pointer.
----------------
jrtc27 wrote:
> Why 128? A hard-coded constant common across all ISAs seems fishy.
This value should be an experimental target-dependent value. But I don't know yet which value is appropriate for riscv.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98101/new/

https://reviews.llvm.org/D98101



More information about the llvm-commits mailing list