[PATCH] D134949: [AMDGPU] Use the right frame register in custom CSR spills
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 30 05:05:13 PDT 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:368
};
+ bool Ignore = false;
----------------
I don't understand what this is supposed to mean
================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:377
+ void setIgnore(bool Val) { Ignore = Val; }
+ bool checkIgnore() const { return Ignore; }
};
----------------
I don't understand ignore, but checkIgnore is a weird getter name. getIgnored or isIgnored
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134949/new/
https://reviews.llvm.org/D134949
More information about the llvm-commits
mailing list