[PATCH] D130466: [LICM] - Add option to force thread model single
Shubham Narlawar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 30 03:50:24 PDT 2022
gsocshubham added inline comments.
================
Comment at: llvm/lib/Transforms/Scalar/LICM.cpp:116
+ cl::init(false),
+ cl::desc("Allow data races in LICM pass"));
+
----------------
nikic wrote:
> Update description to match new option name?
Done.
================
Comment at: llvm/test/Transforms/LICM/promote-sink-atomic-store-arg.ll:73
+entry:
+ %n.addr = alloca i32, align 4
+ %u.addr = alloca i32, align 4
----------------
This IR is obtained from below C testcase -
```
void f(int n, int u) {
for (int i = 0; i < n; ++i) {
__atomic_store_n( &u, i, __ATOMIC_SEQ_CST );
}
}
```
================
Comment at: llvm/test/Transforms/LICM/promote-sink-store-arg.ll:98
+for.inc: ; preds = %for.body
+ %i4 = load i32, ptr %i, align 4
+ %inc = add nsw i32 %i4, 1
----------------
arsenm wrote:
> How is the threadedness relevant in a case that doesn't use atomic loads and stores?
I have added a new test named - promote-sink-atomic-store-arg.ll below which contains atomic store.
Let me know WDYT of the new test.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130466/new/
https://reviews.llvm.org/D130466
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