[PATCH] D134881: [RISCV] Branchless lowering for select (and (x , 0x1) == 0), y, (z ^ y) ) and select (and (x , 0x1) == 0), y, (z | y) )

[Alex Bradbury via Phabricator via llvm-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

Left some tiny nits re formatting, but otherwise this LGTM.



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9046
+            (FalseV.getOperand(0) == TrueV || FalseV.getOperand(1) == TrueV)) {
+          Src1 =
+              FalseV.getOperand(0) == TrueV ? FalseV.getOperand(1) : FalseV.getOperand(0);
----------------
clang-format is suggesting some different formatting for this line and the equivalent one in the branch below.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9068
+        unsigned int CmpSz = LHS.getSimpleValueType().getSizeInBits();
+        // we need mask of all zeros or ones with same size of the other
+        // operands.
----------------
Nit: we => We


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9081
+        SDValue And = DAG.getNode(ISD::AND, DL, VT, Mask, Src1); // Mask & z
+        return DAG.getNode(Opcode, DL, VT, And, Src2);  // And Op y
+      }
----------------
clang-format is aligning the comment with the line above for me.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134881/new/

https://reviews.llvm.org/D134881