[llvm] 923909a - [DAG] Simplify the select of constant combine code. NFC

[Amaury Séchet via llvm-commits]

Author: Amaury Séchet
Date: 2022-09-30T01:03:14Z
New Revision: 923909afbe62a9840fc90e4f6db8f5e8635cd833

URL: https://github.com/llvm/llvm-project/commit/923909afbe62a9840fc90e4f6db8f5e8635cd833
DIFF: https://github.com/llvm/llvm-project/commit/923909afbe62a9840fc90e4f6db8f5e8635cd833.diff

LOG: [DAG] Simplify the select of constant combine code. NFC

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 8d428dccf865..d6190ad3f12a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -10278,32 +10278,27 @@ SDValue DAGCombiner::foldSelectOfConstants(SDNode *N) {
   // is also a target-independent combine here in DAGCombiner in the other
   // direction for (select Cond, -1, 0) when the condition is not i1.
   if (CondVT == MVT::i1 && !LegalOperations) {
+    // select Cond, 1, 0 --> zext (Cond)
+    if (C1->isOne() && C2->isZero())
+      return DAG.getZExtOrTrunc(Cond, DL, VT);
+
+    // select Cond, -1, 0 --> sext (Cond)
+    if (C1->isAllOnes() && C2->isZero())
+      return DAG.getSExtOrTrunc(Cond, DL, VT);
+
+    // select Cond, 0, 1 --> zext (!Cond)
     if (C1->isZero() && C2->isOne()) {
-      // select Cond, 0, 1 --> zext (!Cond)
       SDValue NotCond = DAG.getNOT(DL, Cond, MVT::i1);
-      if (VT != MVT::i1)
-        NotCond = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, NotCond);
+      NotCond = DAG.getZExtOrTrunc(NotCond, DL, VT);
       return NotCond;
     }
-    if (C1->isZero() && C2->isAllOnes()) {
+
       // select Cond, 0, -1 --> sext (!Cond)
-      SDValue NotCond = DAG.getNOT(DL, Cond, MVT::i1);
-      if (VT != MVT::i1)
-        NotCond = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, NotCond);
-      return NotCond;
-    }
-    if (C1->isOne() && C2->isZero()) {
-      // select Cond, 1, 0 --> zext (Cond)
-      if (VT != MVT::i1)
-        Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Cond);
-      return Cond;
-    }
-    if (C1->isAllOnes() && C2->isZero()) {
-      // select Cond, -1, 0 --> sext (Cond)
-      if (VT != MVT::i1)
-        Cond = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Cond);
-      return Cond;
-    }
+      if (C1->isZero() && C2->isAllOnes()) {
+        SDValue NotCond = DAG.getNOT(DL, Cond, MVT::i1);
+        NotCond = DAG.getSExtOrTrunc(NotCond, DL, VT);
+        return NotCond;
+      }
 
     // Use a target hook because some targets may prefer to transform in the
     // other direction.
@@ -10312,24 +10307,22 @@ SDValue DAGCombiner::foldSelectOfConstants(SDNode *N) {
       // an extend and add.
       const APInt &C1Val = C1->getAPIntValue();
       const APInt &C2Val = C2->getAPIntValue();
+
+      // select Cond, C1, C1-1 --> add (zext Cond), C1-1
       if (C1Val - 1 == C2Val) {
-        // select Cond, C1, C1-1 --> add (zext Cond), C1-1
-        if (VT != MVT::i1)
-          Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Cond);
+        Cond = DAG.getZExtOrTrunc(Cond, DL, VT);
         return DAG.getNode(ISD::ADD, DL, VT, Cond, N2);
       }
 
+      // select Cond, C1, C1+1 --> add (sext Cond), C1+1
       if (C1Val + 1 == C2Val) {
-        // select Cond, C1, C1+1 --> add (sext Cond), C1+1
-        if (VT != MVT::i1)
-          Cond = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Cond);
+        Cond = DAG.getSExtOrTrunc(Cond, DL, VT);
         return DAG.getNode(ISD::ADD, DL, VT, Cond, N2);
       }
 
       // select Cond, Pow2, 0 --> (zext Cond) << log2(Pow2)
       if (C1Val.isPowerOf2() && C2Val.isZero()) {
-        if (VT != MVT::i1)
-          Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Cond);
+        Cond = DAG.getZExtOrTrunc(Cond, DL, VT);
         SDValue ShAmtC =
             DAG.getShiftAmountConstant(C1Val.exactLogBase2(), VT, DL);
         return DAG.getNode(ISD::SHL, DL, VT, Cond, ShAmtC);