[llvm] 04a65d6 - Revert D134638 "[Clang][LoongArch] Add inline asm support for constraints k/m/ZB/ZC"
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 29 00:55:05 PDT 2022
Author: Fangrui Song
Date: 2022-09-29T00:54:56-07:00
New Revision: 04a65d62a0c67da0ee383c8f1d74dea6d8b83a7e
URL: https://github.com/llvm/llvm-project/commit/04a65d62a0c67da0ee383c8f1d74dea6d8b83a7e
DIFF: https://github.com/llvm/llvm-project/commit/04a65d62a0c67da0ee383c8f1d74dea6d8b83a7e.diff
LOG: Revert D134638 "[Clang][LoongArch] Add inline asm support for constraints k/m/ZB/ZC"
This reverts commit b7baddc7557e5c35a0f6a604a134d849265a99d4.
Broke CodeGen/X86/callbr-asm-kill.mir
We shall pay attention when adding new constraints.
Added:
Modified:
clang/lib/Basic/Targets/LoongArch.cpp
clang/lib/Basic/Targets/LoongArch.h
clang/test/CodeGen/LoongArch/inline-asm-constraints.c
llvm/include/llvm/IR/InlineAsm.h
llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
llvm/lib/Target/LoongArch/LoongArchISelLowering.h
Removed:
llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZB.ll
llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZC.ll
llvm/test/CodeGen/LoongArch/inline-asm-constraint-k.ll
llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll
################################################################################
diff --git a/clang/lib/Basic/Targets/LoongArch.cpp b/clang/lib/Basic/Targets/LoongArch.cpp
index 1ad9c0fb8b495..cc93206dad686 100644
--- a/clang/lib/Basic/Targets/LoongArch.cpp
+++ b/clang/lib/Basic/Targets/LoongArch.cpp
@@ -67,19 +67,14 @@ bool LoongArchTargetInfo::validateAsmConstraint(
const char *&Name, TargetInfo::ConstraintInfo &Info) const {
// See the GCC definitions here:
// https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html
- // Note that the 'm' constraint is handled in TargetInfo.
switch (*Name) {
+ // TODO: handle 'k', 'm', "ZB", "ZC".
default:
return false;
case 'f':
// A floating-point register (if available).
Info.setAllowsRegister();
return true;
- case 'k':
- // A memory operand whose address is formed by a base register and
- // (optionally scaled) index register.
- Info.setAllowsMemory();
- return true;
case 'l':
// A signed 16-bit constant.
Info.setRequiresImmediate(-32768, 32767);
@@ -92,36 +87,7 @@ bool LoongArchTargetInfo::validateAsmConstraint(
// An unsigned 12-bit constant (for logic instructions).
Info.setRequiresImmediate(0, 4095);
return true;
- case 'Z':
- // ZB: An address that is held in a general-purpose register. The offset is
- // zero.
- // ZC: A memory operand whose address is formed by a base register
- // and offset that is suitable for use in instructions with the same
- // addressing mode as ll.w and sc.w.
- if (Name[1] == 'C' || Name[1] == 'B') {
- Info.setAllowsMemory();
- ++Name; // Skip over 'Z'.
- return true;
- }
- return false;
- }
-}
-
-std::string
-LoongArchTargetInfo::convertConstraint(const char *&Constraint) const {
- std::string R;
- switch (*Constraint) {
- case 'Z':
- // "ZC"/"ZB" are two-character constraints; add "^" hint for later
- // parsing.
- R = "^" + std::string(Constraint, 2);
- ++Constraint;
- break;
- default:
- R = TargetInfo::convertConstraint(Constraint);
- break;
}
- return R;
}
void LoongArchTargetInfo::getTargetDefines(const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/LoongArch.h b/clang/lib/Basic/Targets/LoongArch.h
index 47ee2fc737752..5d711c6b1db4c 100644
--- a/clang/lib/Basic/Targets/LoongArch.h
+++ b/clang/lib/Basic/Targets/LoongArch.h
@@ -55,7 +55,6 @@ class LLVM_LIBRARY_VISIBILITY LoongArchTargetInfo : public TargetInfo {
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override;
- std::string convertConstraint(const char *&Constraint) const override;
bool hasBitIntType() const override { return true; }
};
diff --git a/clang/test/CodeGen/LoongArch/inline-asm-constraints.c b/clang/test/CodeGen/LoongArch/inline-asm-constraints.c
index d7d425ea0766f..9c9c60e484930 100644
--- a/clang/test/CodeGen/LoongArch/inline-asm-constraints.c
+++ b/clang/test/CodeGen/LoongArch/inline-asm-constraints.c
@@ -15,12 +15,6 @@ void test_f(void) {
asm volatile ("" :: "f"(d));
}
-void test_k(int *p, int idx) {
-// CHECK-LABEL: define{{.*}} void @test_k(ptr noundef %p, i32 noundef{{.*}} %idx)
-// CHECK: call void asm sideeffect "", "*k"(ptr elementtype(i32) %{{.*}})
- asm volatile("" :: "k"(*(p+idx)));
-}
-
void test_l(void) {
// CHECK-LABEL: define{{.*}} void @test_l()
// CHECK: call void asm sideeffect "", "l"(i32 32767)
@@ -29,12 +23,6 @@ void test_l(void) {
asm volatile ("" :: "l"(-32768));
}
-void test_m(int *p) {
-// CHECK-LABEL: define{{.*}} void @test_m(ptr noundef %p)
-// CHECK: call void asm sideeffect "", "*m"(ptr nonnull elementtype(i32) %{{.*}})
- asm volatile("" :: "m"(*(p+4)));
-}
-
void test_I(void) {
// CHECK-LABEL: define{{.*}} void @test_I()
// CHECK: call void asm sideeffect "", "I"(i32 2047)
@@ -50,15 +38,3 @@ void test_K(void) {
// CHECK: call void asm sideeffect "", "K"(i32 0)
asm volatile ("" :: "K"(0));
}
-
-void test_ZB(int *p) {
-// CHECK-LABEL: define{{.*}} void @test_ZB(ptr noundef %p)
-// CHECK: call void asm sideeffect "", "*^ZB"(ptr elementtype(i32) %p)
- asm volatile ("" :: "ZB"(*p));
-}
-
-void test_ZC(int *p) {
-// CHECK-LABEL: define{{.*}} void @test_ZC(ptr noundef %p)
-// CHECK: call void asm sideeffect "", "*^ZC"(ptr elementtype(i32) %p)
- asm volatile ("" :: "ZC"(*p));
-}
diff --git a/llvm/include/llvm/IR/InlineAsm.h b/llvm/include/llvm/IR/InlineAsm.h
index 65e5335168d69..0a8d27aad58a2 100644
--- a/llvm/include/llvm/IR/InlineAsm.h
+++ b/llvm/include/llvm/IR/InlineAsm.h
@@ -252,7 +252,6 @@ class InlineAsm final : public Value {
Constraint_Unknown = 0,
Constraint_es,
Constraint_i,
- Constraint_k,
Constraint_m,
Constraint_o,
Constraint_v,
@@ -270,7 +269,6 @@ class InlineAsm final : public Value {
Constraint_Uy,
Constraint_X,
Constraint_Z,
- Constraint_ZB,
Constraint_ZC,
Constraint_Zy,
@@ -430,8 +428,6 @@ class InlineAsm final : public Value {
return "es";
case InlineAsm::Constraint_i:
return "i";
- case InlineAsm::Constraint_k:
- return "k";
case InlineAsm::Constraint_m:
return "m";
case InlineAsm::Constraint_o:
@@ -464,8 +460,6 @@ class InlineAsm final : public Value {
return "X";
case InlineAsm::Constraint_Z:
return "Z";
- case InlineAsm::Constraint_ZB:
- return "ZB";
case InlineAsm::Constraint_ZC:
return "ZC";
case InlineAsm::Constraint_Zy:
diff --git a/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp b/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
index 9d69a26e18b13..9a7fb73b736c8 100644
--- a/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
@@ -68,35 +68,6 @@ bool LoongArchAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
return true;
}
-bool LoongArchAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
- unsigned OpNo,
- const char *ExtraCode,
- raw_ostream &OS) {
- // TODO: handle extra code.
- if (ExtraCode)
- return true;
-
- const MachineOperand &BaseMO = MI->getOperand(OpNo);
- // Base address must be a register.
- if (!BaseMO.isReg())
- return true;
- // Print the base address register.
- OS << "$" << LoongArchInstPrinter::getRegisterName(BaseMO.getReg());
- // Print the offset register or immediate if has.
- if (OpNo + 1 < MI->getNumOperands()) {
- const MachineOperand &OffsetMO = MI->getOperand(OpNo + 1);
- if (OffsetMO.isReg())
- OS << ", $" << LoongArchInstPrinter::getRegisterName(OffsetMO.getReg());
- else if (OffsetMO.isImm())
- OS << ", " << OffsetMO.getImm();
- else
- return true;
- }
- return false;
-
- return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, ExtraCode, OS);
-}
-
bool LoongArchAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
AsmPrinter::runOnMachineFunction(MF);
return true;
diff --git a/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h b/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
index 23e29354743e6..941c86633fa1b 100644
--- a/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
+++ b/llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
@@ -38,8 +38,6 @@ class LLVM_LIBRARY_VISIBILITY LoongArchAsmPrinter : public AsmPrinter {
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &OS) override;
- bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
- const char *ExtraCode, raw_ostream &OS) override;
// tblgen'erated function.
bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
index 1c3c5188a23ef..bb40ff8175748 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
@@ -77,59 +77,6 @@ void LoongArchDAGToDAGISel::Select(SDNode *Node) {
SelectCode(Node);
}
-bool LoongArchDAGToDAGISel::SelectInlineAsmMemoryOperand(
- const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
- switch (ConstraintID) {
- default:
- llvm_unreachable("unexpected asm memory constraint");
- // Reg+Reg addressing.
- case InlineAsm::Constraint_k:
- OutOps.push_back(Op.getOperand(0));
- OutOps.push_back(Op.getOperand(1));
- return false;
- // Reg+simm12 addressing.
- case InlineAsm::Constraint_m: {
- SDValue Base = Op;
- SDValue Offset =
- CurDAG->getTargetConstant(0, SDLoc(Op), Subtarget->getGRLenVT());
- if (CurDAG->isBaseWithConstantOffset(Op)) {
- ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op.getOperand(1));
- if (isIntN(12, CN->getSExtValue())) {
- Base = Op.getOperand(0);
- Offset = CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(Op),
- Op.getValueType());
- }
- }
- OutOps.push_back(Base);
- OutOps.push_back(Offset);
- return false;
- }
- case InlineAsm::Constraint_ZB:
- OutOps.push_back(Op);
- // No offset.
- return false;
- // Reg+(simm14<<2) addressing.
- case InlineAsm::Constraint_ZC: {
- SDValue Base = Op;
- SDValue Offset =
- CurDAG->getTargetConstant(0, SDLoc(Op), Subtarget->getGRLenVT());
- if (CurDAG->isBaseWithConstantOffset(Op)) {
- ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op.getOperand(1));
- if (isIntN(16, CN->getSExtValue()) &&
- isAligned(Align(4ULL), CN->getZExtValue())) {
- Base = Op.getOperand(0);
- Offset = CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(Op),
- Op.getValueType());
- }
- }
- OutOps.push_back(Base);
- OutOps.push_back(Offset);
- return false;
- }
- }
- return true;
-}
-
bool LoongArchDAGToDAGISel::SelectBaseAddr(SDValue Addr, SDValue &Base) {
// If this is FrameIndex, select it directly. Otherwise just let it get
// selected to a register independently.
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
index 81dec0e028134..8c9357d75979c 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
@@ -38,9 +38,6 @@ class LoongArchDAGToDAGISel : public SelectionDAGISel {
void Select(SDNode *Node) override;
- bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
- std::vector<SDValue> &OutOps) override;
-
bool SelectBaseAddr(SDValue Addr, SDValue &Base);
bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 6cf7e01b63ac7..9c443bab3901d 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -2024,27 +2024,14 @@ LoongArchTargetLowering::getConstraintType(StringRef Constraint) const {
case 'I':
case 'K':
return C_Immediate;
- case 'k':
- return C_Memory;
}
}
- if (Constraint == "ZC" || Constraint == "ZB")
- return C_Memory;
+ // TODO: handle 'k", "ZB" and "ZC".
- // 'm' is handled here.
return TargetLowering::getConstraintType(Constraint);
}
-unsigned LoongArchTargetLowering::getInlineAsmMemConstraint(
- StringRef ConstraintCode) const {
- return StringSwitch<unsigned>(ConstraintCode)
- .Case("k", InlineAsm::Constraint_k)
- .Case("ZB", InlineAsm::Constraint_ZB)
- .Case("ZC", InlineAsm::Constraint_ZC)
- .Default(TargetLowering::getInlineAsmMemConstraint(ConstraintCode));
-}
-
std::pair<unsigned, const TargetRegisterClass *>
LoongArchTargetLowering::getRegForInlineAsmConstraint(
const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const {
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 62b8ef3d78ed4..084b269cd3979 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -162,8 +162,6 @@ class LoongArchTargetLowering : public TargetLowering {
ConstraintType getConstraintType(StringRef Constraint) const override;
- unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override;
-
std::pair<unsigned, const TargetRegisterClass *>
getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
StringRef Constraint, MVT VT) const override;
diff --git a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZB.ll b/llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZB.ll
deleted file mode 100644
index 4373855e4c008..0000000000000
--- a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZB.ll
+++ /dev/null
@@ -1,49 +0,0 @@
-; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s \
-; RUN: | FileCheck %s --check-prefix=ASM
-; RUN: llc --mtriple=loongarch64 --print-after-isel -o /dev/null 2>&1 < %s \
-; RUN: | FileCheck %s --check-prefix=MACHINE-INSTR
-
-;; Note amswap.w is not available on loongarch32.
-
-define void @ZB(ptr %p) nounwind {
-; ASM-LABEL: ZB:
-; ASM: # %bb.0:
-; ASM-NEXT: #APP
-; ASM-NEXT: amswap.w $t0, $t1, $a0
-; ASM-NEXT: #NO_APP
-; ASM-NEXT: ret
-;; Make sure machine instr with this "ZB" constraint is printed correctly.
-; MACHINE-INSTR: INLINEASM{{.*}}[mem:ZB]
- call void asm "amswap.w $$r12, $$r13, $0", "*^ZB"(ptr elementtype(i32) %p)
- ret void
-}
-
-define void @ZB_constant_offset(ptr %p) nounwind {
-; ASM-LABEL: ZB_constant_offset:
-; ASM: # %bb.0:
-; ASM-NEXT: addi.d $a0, $a0, 1
-; ASM-NEXT: #APP
-; ASM-NEXT: amswap.w $t0, $t1, $a0
-; ASM-NEXT: #NO_APP
-; ASM-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 1
-;; Make sure machine instr with this "ZB" constraint is printed correctly.
-; MACHINE-INSTR: INLINEASM{{.*}}[mem:ZB]
- call void asm "amswap.w $$r12, $$r13, $0", "*^ZB"(ptr elementtype(i32) %1)
- ret void
-}
-
-define void @ZB_variable_offset(ptr %p, i32 signext %idx) nounwind {
-; ASM-LABEL: ZB_variable_offset:
-; ASM: # %bb.0:
-; ASM-NEXT: add.d $a0, $a0, $a1
-; ASM-NEXT: #APP
-; ASM-NEXT: amswap.w $t0, $t1, $a0
-; ASM-NEXT: #NO_APP
-; ASM-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 %idx
-;; Make sure machine instr with this "ZB" constraint is printed correctly.
-; MACHINE-INSTR: INLINEASM{{.*}}[mem:ZB]
- call void asm "amswap.w $$r12, $$r13, $0", "*^ZB"(ptr elementtype(i32) %1)
- ret void
-}
diff --git a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZC.ll b/llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZC.ll
deleted file mode 100644
index 9c053c4d24857..0000000000000
--- a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZC.ll
+++ /dev/null
@@ -1,170 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc --mtriple=loongarch32 --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32
-; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA64
-
-define i32 @ZC_offset_neg_32769(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_neg_32769:
-; LA32: # %bb.0:
-; LA32-NEXT: lu12i.w $a1, -9
-; LA32-NEXT: ori $a1, $a1, 4095
-; LA32-NEXT: add.w $a0, $a0, $a1
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_neg_32769:
-; LA64: # %bb.0:
-; LA64-NEXT: lu12i.w $a1, -9
-; LA64-NEXT: ori $a1, $a1, 4095
-; LA64-NEXT: add.d $a0, $a0, $a1
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 -32769
- %2 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @ZC_offset_neg_32768(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_neg_32768:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, -32768
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_neg_32768:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, -32768
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 -32768
- %2 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @ZC_offset_neg_4(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_neg_4:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, -4
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_neg_4:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, -4
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 -4
- %2 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @ZC_offset_neg_1(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_neg_1:
-; LA32: # %bb.0:
-; LA32-NEXT: addi.w $a0, $a0, -1
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_neg_1:
-; LA64: # %bb.0:
-; LA64-NEXT: addi.d $a0, $a0, -1
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 -1
- %2 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @ZC_offset_0(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_0:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_0:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %p)
- ret i32 %1
-}
-
-define i32 @ZC_offset_1(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_1:
-; LA32: # %bb.0:
-; LA32-NEXT: addi.w $a0, $a0, 1
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_1:
-; LA64: # %bb.0:
-; LA64-NEXT: addi.d $a0, $a0, 1
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 1
- %2 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @ZC_offset_32764(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_32764:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, 32764
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_32764:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, 32764
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 32764
- %2 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @ZC_offset_32767(ptr %p) nounwind {
-; LA32-LABEL: ZC_offset_32767:
-; LA32: # %bb.0:
-; LA32-NEXT: lu12i.w $a1, 7
-; LA32-NEXT: ori $a1, $a1, 4095
-; LA32-NEXT: add.w $a0, $a0, $a1
-; LA32-NEXT: #APP
-; LA32-NEXT: ll.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: ZC_offset_32767:
-; LA64: # %bb.0:
-; LA64-NEXT: lu12i.w $a1, 7
-; LA64-NEXT: ori $a1, $a1, 4095
-; LA64-NEXT: add.d $a0, $a0, $a1
-; LA64-NEXT: #APP
-; LA64-NEXT: ll.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 32767
- %2 = call i32 asm "ll.w $0, $1", "=r,*^ZC"(ptr elementtype(i32) %1)
- ret i32 %2
-}
diff --git a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-k.ll b/llvm/test/CodeGen/LoongArch/inline-asm-constraint-k.ll
deleted file mode 100644
index 5ffe4b48c3f54..0000000000000
--- a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-k.ll
+++ /dev/null
@@ -1,33 +0,0 @@
-; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s \
-; RUN: | FileCheck %s --check-prefix=ASM
-; RUN: llc --mtriple=loongarch64 --print-after-isel -o /dev/null 2>&1 < %s \
-; RUN: | FileCheck %s --check-prefix=MACHINE-INSTR
-
-define i64 @k_variable_offset(ptr %p, i64 %idx) nounwind {
-; ASM-LABEL: k_variable_offset:
-; ASM: # %bb.0:
-; ASM-NEXT: #APP
-; ASM-NEXT: ldx.d $a0, $a0, $a1
-; ASM-NEXT: #NO_APP
-; ASM-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i64 %idx
-;; Make sure machine instr with this 'k' constraint is printed correctly.
-; MACHINE-INSTR: INLINEASM{{.*}}[mem:k]
- %2 = call i64 asm "ldx.d $0, $1", "=r,*k"(ptr elementtype(i64) %1)
- ret i64 %2
-}
-
-define i64 @k_constant_offset(ptr %p) nounwind {
-; ASM-LABEL: k_constant_offset:
-; ASM: # %bb.0:
-; ASM-NEXT: ori $a1, $zero, 5
-; ASM-NEXT: #APP
-; ASM-NEXT: ldx.d $a0, $a0, $a1
-; ASM-NEXT: #NO_APP
-; ASM-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i64 5
-;; Make sure machine instr with this 'k' constraint is printed correctly.
-; MACHINE-INSTR: INLINEASM{{.*}}[mem:k]
- %2 = call i64 asm "ldx.d $0, $1", "=r,*k"(ptr elementtype(i64) %1)
- ret i64 %2
-}
diff --git a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll b/llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll
deleted file mode 100644
index 129368aee1d31..0000000000000
--- a/llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll
+++ /dev/null
@@ -1,145 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc --mtriple=loongarch32 --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32
-; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA64
-
-define i32 @m_offset_neg_2049(ptr %p) nounwind {
-; LA32-LABEL: m_offset_neg_2049:
-; LA32: # %bb.0:
-; LA32-NEXT: lu12i.w $a1, -1
-; LA32-NEXT: ori $a1, $a1, 2047
-; LA32-NEXT: add.w $a0, $a0, $a1
-; LA32-NEXT: #APP
-; LA32-NEXT: ld.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: m_offset_neg_2049:
-; LA64: # %bb.0:
-; LA64-NEXT: lu12i.w $a1, -1
-; LA64-NEXT: ori $a1, $a1, 2047
-; LA64-NEXT: add.d $a0, $a0, $a1
-; LA64-NEXT: #APP
-; LA64-NEXT: ld.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 -2049
- %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @m_offset_neg_2048(ptr %p) nounwind {
-; LA32-LABEL: m_offset_neg_2048:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ld.w $a0, $a0, -2048
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: m_offset_neg_2048:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ld.w $a0, $a0, -2048
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 -2048
- %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @m_offset_neg_1(ptr %p) nounwind {
-; LA32-LABEL: m_offset_neg_1:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ld.w $a0, $a0, -1
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: m_offset_neg_1:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ld.w $a0, $a0, -1
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 -1
- %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @m_offset_0(ptr %p) nounwind {
-; LA32-LABEL: m_offset_0:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ld.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: m_offset_0:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ld.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %p)
- ret i32 %1
-}
-
-define i32 @m_offset_1(ptr %p) nounwind {
-; LA32-LABEL: m_offset_1:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ld.w $a0, $a0, 1
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: m_offset_1:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ld.w $a0, $a0, 1
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 1
- %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @m_offset_2047(ptr %p) nounwind {
-; LA32-LABEL: m_offset_2047:
-; LA32: # %bb.0:
-; LA32-NEXT: #APP
-; LA32-NEXT: ld.w $a0, $a0, 2047
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: m_offset_2047:
-; LA64: # %bb.0:
-; LA64-NEXT: #APP
-; LA64-NEXT: ld.w $a0, $a0, 2047
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 2047
- %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
- ret i32 %2
-}
-
-define i32 @m_offset_2048(ptr %p) nounwind {
-; LA32-LABEL: m_offset_2048:
-; LA32: # %bb.0:
-; LA32-NEXT: ori $a1, $zero, 2048
-; LA32-NEXT: add.w $a0, $a0, $a1
-; LA32-NEXT: #APP
-; LA32-NEXT: ld.w $a0, $a0, 0
-; LA32-NEXT: #NO_APP
-; LA32-NEXT: ret
-;
-; LA64-LABEL: m_offset_2048:
-; LA64: # %bb.0:
-; LA64-NEXT: ori $a1, $zero, 2048
-; LA64-NEXT: add.d $a0, $a0, $a1
-; LA64-NEXT: #APP
-; LA64-NEXT: ld.w $a0, $a0, 0
-; LA64-NEXT: #NO_APP
-; LA64-NEXT: ret
- %1 = getelementptr inbounds i8, ptr %p, i32 2048
- %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
- ret i32 %2
-}
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