[PATCH] D134854: [DAG] Update `isKnownNeverNaN` for `FMA/FMAD`

Pierre van Houtryve via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 29 00:46:05 PDT 2022


Pierre-vh created this revision.
Pierre-vh added reviewers: arsenm, foad.
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We can still get a NaN even if none of the operands are NaN,
e.g. from +inf/-inf. D50804 <https://reviews.llvm.org/D50804> didn't catch that.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D134854

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4698,7 +4698,9 @@
   case ISD::FDIV:
   case ISD::FREM:
   case ISD::FSIN:
-  case ISD::FCOS: {
+  case ISD::FCOS:
+  case ISD::FMA:
+  case ISD::FMAD: {
     if (SNaN)
       return true;
     // TODO: Need isKnownNeverInfinity
@@ -4735,14 +4737,6 @@
   case ISD::SINT_TO_FP:
   case ISD::UINT_TO_FP:
     return true;
-  case ISD::FMA:
-  case ISD::FMAD: {
-    if (SNaN)
-      return true;
-    return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
-           isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
-           isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
-  }
   case ISD::FSQRT: // Need is known positive
   case ISD::FLOG:
   case ISD::FLOG2:


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