[llvm] 48b8dee - remove LE,BE labels inserted incorrectly
via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 28 09:08:07 PDT 2022
Author: bipmis
Date: 2022-09-28T17:07:26+01:00
New Revision: 48b8dee773f3b4f25a8e5ccc3267fae18836a082
URL: https://github.com/llvm/llvm-project/commit/48b8dee773f3b4f25a8e5ccc3267fae18836a082
DIFF: https://github.com/llvm/llvm-project/commit/48b8dee773f3b4f25a8e5ccc3267fae18836a082.diff
LOG: remove LE,BE labels inserted incorrectly
Added:
Modified:
llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll b/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
index fc1de92b22be..1c09857cc32b 100644
--- a/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
+++ b/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
@@ -46,30 +46,6 @@ define i16 @loadCombine_2consecutive_BE(ptr %p) {
}
define i32 @loadCombine_4consecutive(ptr %p) {
-; LE-LABEL: @loadCombine_4consecutive(
-; LE-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
-; LE-NEXT: ret i32 [[L1]]
-;
-; BE-LABEL: @loadCombine_4consecutive(
-; BE-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
-; BE-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
-; BE-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
-; BE-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1
-; BE-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1
-; BE-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1
-; BE-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1
-; BE-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32
-; BE-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32
-; BE-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32
-; BE-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32
-; BE-NEXT: [[S2:%.*]] = shl i32 [[E2]], 8
-; BE-NEXT: [[S3:%.*]] = shl i32 [[E3]], 16
-; BE-NEXT: [[S4:%.*]] = shl i32 [[E4]], 24
-; BE-NEXT: [[O1:%.*]] = or i32 [[E1]], [[S2]]
-; BE-NEXT: [[O2:%.*]] = or i32 [[O1]], [[S3]]
-; BE-NEXT: [[O3:%.*]] = or i32 [[O2]], [[S4]]
-; BE-NEXT: ret i32 [[O3]]
-;
; ALL-LABEL: @loadCombine_4consecutive(
; ALL-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
@@ -114,30 +90,6 @@ define i32 @loadCombine_4consecutive(ptr %p) {
}
define i32 @loadCombine_4consecutive_BE(ptr %p) {
-; LE-LABEL: @loadCombine_4consecutive_BE(
-; LE-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
-; LE-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
-; LE-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
-; LE-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1
-; LE-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1
-; LE-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1
-; LE-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1
-; LE-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32
-; LE-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32
-; LE-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32
-; LE-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32
-; LE-NEXT: [[S1:%.*]] = shl i32 [[E1]], 24
-; LE-NEXT: [[S2:%.*]] = shl i32 [[E2]], 16
-; LE-NEXT: [[S3:%.*]] = shl i32 [[E3]], 8
-; LE-NEXT: [[O1:%.*]] = or i32 [[S1]], [[S2]]
-; LE-NEXT: [[O2:%.*]] = or i32 [[O1]], [[S3]]
-; LE-NEXT: [[O3:%.*]] = or i32 [[O2]], [[E4]]
-; LE-NEXT: ret i32 [[O3]]
-;
-; BE-LABEL: @loadCombine_4consecutive_BE(
-; BE-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
-; BE-NEXT: ret i32 [[L1]]
-;
; ALL-LABEL: @loadCombine_4consecutive_BE(
; ALL-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
@@ -182,32 +134,6 @@ define i32 @loadCombine_4consecutive_BE(ptr %p) {
}
define i32 @loadCombine_4consecutive_alias(ptr %p) {
-; LE-LABEL: @loadCombine_4consecutive_alias(
-; LE-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
-; LE-NEXT: store i8 10, ptr [[P]], align 1
-; LE-NEXT: ret i32 [[L1]]
-;
-; BE-LABEL: @loadCombine_4consecutive_alias(
-; BE-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
-; BE-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
-; BE-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
-; BE-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1
-; BE-NEXT: store i8 10, ptr [[P]], align 1
-; BE-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1
-; BE-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1
-; BE-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1
-; BE-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32
-; BE-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32
-; BE-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32
-; BE-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32
-; BE-NEXT: [[S2:%.*]] = shl i32 [[E2]], 8
-; BE-NEXT: [[S3:%.*]] = shl i32 [[E3]], 16
-; BE-NEXT: [[S4:%.*]] = shl i32 [[E4]], 24
-; BE-NEXT: [[O1:%.*]] = or i32 [[E1]], [[S2]]
-; BE-NEXT: [[O2:%.*]] = or i32 [[O1]], [[S3]]
-; BE-NEXT: [[O3:%.*]] = or i32 [[O2]], [[S4]]
-; BE-NEXT: ret i32 [[O3]]
-;
; ALL-LABEL: @loadCombine_4consecutive_alias(
; ALL-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
@@ -254,32 +180,6 @@ define i32 @loadCombine_4consecutive_alias(ptr %p) {
}
define i32 @loadCombine_4consecutive_alias_BE(ptr %p) {
-; LE-LABEL: @loadCombine_4consecutive_alias_BE(
-; LE-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
-; LE-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
-; LE-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
-; LE-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1
-; LE-NEXT: store i8 10, ptr [[P]], align 1
-; LE-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1
-; LE-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1
-; LE-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1
-; LE-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32
-; LE-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32
-; LE-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32
-; LE-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32
-; LE-NEXT: [[S1:%.*]] = shl i32 [[E1]], 24
-; LE-NEXT: [[S2:%.*]] = shl i32 [[E2]], 16
-; LE-NEXT: [[S3:%.*]] = shl i32 [[E3]], 8
-; LE-NEXT: [[O1:%.*]] = or i32 [[S1]], [[S2]]
-; LE-NEXT: [[O2:%.*]] = or i32 [[O1]], [[S3]]
-; LE-NEXT: [[O3:%.*]] = or i32 [[O2]], [[E4]]
-; LE-NEXT: ret i32 [[O3]]
-;
-; BE-LABEL: @loadCombine_4consecutive_alias_BE(
-; BE-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
-; BE-NEXT: store i8 10, ptr [[P]], align 1
-; BE-NEXT: ret i32 [[L1]]
-;
; ALL-LABEL: @loadCombine_4consecutive_alias_BE(
; ALL-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
@@ -811,41 +711,6 @@ define i32 @loadCombine_parLoad1(ptr %p) {
}
define i128 @loadCombine_i128(ptr %p) {
-; LE-LABEL: @loadCombine_i128(
-; LE-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 2
-; LE-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P]], i32 3
-; LE-NEXT: [[L1:%.*]] = load i64, ptr [[P]], align 4
-; LE-NEXT: [[TMP1:%.*]] = zext i64 [[L1]] to i128
-; LE-NEXT: [[L3:%.*]] = load i32, ptr [[P2]], align 4
-; LE-NEXT: [[L4:%.*]] = load i32, ptr [[P3]], align 4
-; LE-NEXT: [[E3:%.*]] = zext i32 [[L3]] to i128
-; LE-NEXT: [[E4:%.*]] = zext i32 [[L4]] to i128
-; LE-NEXT: [[S3:%.*]] = shl i128 [[E3]], 64
-; LE-NEXT: [[S4:%.*]] = shl i128 [[E4]], 96
-; LE-NEXT: [[O2:%.*]] = or i128 [[TMP1]], [[S3]]
-; LE-NEXT: [[O3:%.*]] = or i128 [[O2]], [[S4]]
-; LE-NEXT: ret i128 [[O3]]
-;
-; BE-LABEL: @loadCombine_i128(
-; BE-NEXT: [[P1:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
-; BE-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P]], i32 2
-; BE-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P]], i32 3
-; BE-NEXT: [[L1:%.*]] = load i32, ptr [[P]], align 4
-; BE-NEXT: [[L2:%.*]] = load i32, ptr [[P1]], align 4
-; BE-NEXT: [[L3:%.*]] = load i32, ptr [[P2]], align 4
-; BE-NEXT: [[L4:%.*]] = load i32, ptr [[P3]], align 4
-; BE-NEXT: [[E1:%.*]] = zext i32 [[L1]] to i128
-; BE-NEXT: [[E2:%.*]] = zext i32 [[L2]] to i128
-; BE-NEXT: [[E3:%.*]] = zext i32 [[L3]] to i128
-; BE-NEXT: [[E4:%.*]] = zext i32 [[L4]] to i128
-; BE-NEXT: [[S2:%.*]] = shl i128 [[E2]], 32
-; BE-NEXT: [[S3:%.*]] = shl i128 [[E3]], 64
-; BE-NEXT: [[S4:%.*]] = shl i128 [[E4]], 96
-; BE-NEXT: [[O1:%.*]] = or i128 [[E1]], [[S2]]
-; BE-NEXT: [[O2:%.*]] = or i128 [[O1]], [[S3]]
-; BE-NEXT: [[O3:%.*]] = or i128 [[O2]], [[S4]]
-; BE-NEXT: ret i128 [[O3]]
-;
; ALL-LABEL: @loadCombine_i128(
; ALL-NEXT: [[P1:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P]], i32 2
@@ -890,41 +755,6 @@ define i128 @loadCombine_i128(ptr %p) {
}
define i128 @loadCombine_i128_BE(ptr %p) {
-; LE-LABEL: @loadCombine_i128_BE(
-; LE-NEXT: [[P1:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
-; LE-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P]], i32 2
-; LE-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P]], i32 3
-; LE-NEXT: [[L1:%.*]] = load i32, ptr [[P]], align 4
-; LE-NEXT: [[L2:%.*]] = load i32, ptr [[P1]], align 4
-; LE-NEXT: [[L3:%.*]] = load i32, ptr [[P2]], align 4
-; LE-NEXT: [[L4:%.*]] = load i32, ptr [[P3]], align 4
-; LE-NEXT: [[E1:%.*]] = zext i32 [[L1]] to i128
-; LE-NEXT: [[E2:%.*]] = zext i32 [[L2]] to i128
-; LE-NEXT: [[E3:%.*]] = zext i32 [[L3]] to i128
-; LE-NEXT: [[E4:%.*]] = zext i32 [[L4]] to i128
-; LE-NEXT: [[S1:%.*]] = shl i128 [[E1]], 96
-; LE-NEXT: [[S2:%.*]] = shl i128 [[E2]], 64
-; LE-NEXT: [[S3:%.*]] = shl i128 [[E3]], 32
-; LE-NEXT: [[O1:%.*]] = or i128 [[S1]], [[S2]]
-; LE-NEXT: [[O2:%.*]] = or i128 [[O1]], [[S3]]
-; LE-NEXT: [[O3:%.*]] = or i128 [[O2]], [[E4]]
-; LE-NEXT: ret i128 [[O3]]
-;
-; BE-LABEL: @loadCombine_i128_BE(
-; BE-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 2
-; BE-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P]], i32 3
-; BE-NEXT: [[L1:%.*]] = load i64, ptr [[P]], align 4
-; BE-NEXT: [[TMP1:%.*]] = zext i64 [[L1]] to i128
-; BE-NEXT: [[TMP2:%.*]] = shl i128 [[TMP1]], 64
-; BE-NEXT: [[L3:%.*]] = load i32, ptr [[P2]], align 4
-; BE-NEXT: [[L4:%.*]] = load i32, ptr [[P3]], align 4
-; BE-NEXT: [[E3:%.*]] = zext i32 [[L3]] to i128
-; BE-NEXT: [[E4:%.*]] = zext i32 [[L4]] to i128
-; BE-NEXT: [[S3:%.*]] = shl i128 [[E3]], 32
-; BE-NEXT: [[O2:%.*]] = or i128 [[TMP2]], [[S3]]
-; BE-NEXT: [[O3:%.*]] = or i128 [[O2]], [[E4]]
-; BE-NEXT: ret i128 [[O3]]
-;
; ALL-LABEL: @loadCombine_i128_BE(
; ALL-NEXT: [[P1:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P]], i32 2
@@ -969,30 +799,6 @@ define i128 @loadCombine_i128_BE(ptr %p) {
}
define i64 @loadCombine_i64(ptr %p) {
-; LE-LABEL: @loadCombine_i64(
-; LE-NEXT: [[L1:%.*]] = load i64, ptr [[P:%.*]], align 2
-; LE-NEXT: ret i64 [[L1]]
-;
-; BE-LABEL: @loadCombine_i64(
-; BE-NEXT: [[P1:%.*]] = getelementptr i16, ptr [[P:%.*]], i32 1
-; BE-NEXT: [[P2:%.*]] = getelementptr i16, ptr [[P]], i32 2
-; BE-NEXT: [[P3:%.*]] = getelementptr i16, ptr [[P]], i32 3
-; BE-NEXT: [[L1:%.*]] = load i16, ptr [[P]], align 2
-; BE-NEXT: [[L2:%.*]] = load i16, ptr [[P1]], align 2
-; BE-NEXT: [[L3:%.*]] = load i16, ptr [[P2]], align 2
-; BE-NEXT: [[L4:%.*]] = load i16, ptr [[P3]], align 2
-; BE-NEXT: [[E1:%.*]] = zext i16 [[L1]] to i64
-; BE-NEXT: [[E2:%.*]] = zext i16 [[L2]] to i64
-; BE-NEXT: [[E3:%.*]] = zext i16 [[L3]] to i64
-; BE-NEXT: [[E4:%.*]] = zext i16 [[L4]] to i64
-; BE-NEXT: [[S2:%.*]] = shl i64 [[E2]], 16
-; BE-NEXT: [[S3:%.*]] = shl i64 [[E3]], 32
-; BE-NEXT: [[S4:%.*]] = shl i64 [[E4]], 48
-; BE-NEXT: [[O1:%.*]] = or i64 [[E1]], [[S2]]
-; BE-NEXT: [[O2:%.*]] = or i64 [[O1]], [[S3]]
-; BE-NEXT: [[O3:%.*]] = or i64 [[O2]], [[S4]]
-; BE-NEXT: ret i64 [[O3]]
-;
; ALL-LABEL: @loadCombine_i64(
; ALL-NEXT: [[P1:%.*]] = getelementptr i16, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i16, ptr [[P]], i32 2
@@ -1037,30 +843,6 @@ define i64 @loadCombine_i64(ptr %p) {
}
define i64 @loadCombine_i64_BE(ptr %p) {
-; LE-LABEL: @loadCombine_i64_BE(
-; LE-NEXT: [[P1:%.*]] = getelementptr i16, ptr [[P:%.*]], i32 1
-; LE-NEXT: [[P2:%.*]] = getelementptr i16, ptr [[P]], i32 2
-; LE-NEXT: [[P3:%.*]] = getelementptr i16, ptr [[P]], i32 3
-; LE-NEXT: [[L1:%.*]] = load i16, ptr [[P]], align 2
-; LE-NEXT: [[L2:%.*]] = load i16, ptr [[P1]], align 2
-; LE-NEXT: [[L3:%.*]] = load i16, ptr [[P2]], align 2
-; LE-NEXT: [[L4:%.*]] = load i16, ptr [[P3]], align 2
-; LE-NEXT: [[E1:%.*]] = zext i16 [[L1]] to i64
-; LE-NEXT: [[E2:%.*]] = zext i16 [[L2]] to i64
-; LE-NEXT: [[E3:%.*]] = zext i16 [[L3]] to i64
-; LE-NEXT: [[E4:%.*]] = zext i16 [[L4]] to i64
-; LE-NEXT: [[S1:%.*]] = shl i64 [[E1]], 48
-; LE-NEXT: [[S2:%.*]] = shl i64 [[E2]], 32
-; LE-NEXT: [[S3:%.*]] = shl i64 [[E3]], 16
-; LE-NEXT: [[O1:%.*]] = or i64 [[S1]], [[S2]]
-; LE-NEXT: [[O2:%.*]] = or i64 [[O1]], [[S3]]
-; LE-NEXT: [[O3:%.*]] = or i64 [[O2]], [[E4]]
-; LE-NEXT: ret i64 [[O3]]
-;
-; BE-LABEL: @loadCombine_i64_BE(
-; BE-NEXT: [[L1:%.*]] = load i64, ptr [[P:%.*]], align 2
-; BE-NEXT: ret i64 [[L1]]
-;
; ALL-LABEL: @loadCombine_i64_BE(
; ALL-NEXT: [[P1:%.*]] = getelementptr i16, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i16, ptr [[P]], i32 2
@@ -1162,6 +944,7 @@ define i16 @loadCombine_2consecutive_separateBB(ptr %p) {
%p1 = getelementptr i8, ptr %p, i32 1
%l1 = load i8, ptr %p, align 1
br label %bb2
+
bb2:
%l2 = load i8, ptr %p1, align 1
%e1 = zext i8 %l1 to i16
@@ -1193,52 +976,6 @@ define i16 @loadCombine_2consecutive_separateptr(ptr %p, ptr %p2) {
}
define i64 @load64_farLoads(ptr %ptr) {
-; LE-LABEL: @load64_farLoads(
-; LE-NEXT: entry:
-; LE-NEXT: [[TMP0:%.*]] = load i64, ptr [[PTR:%.*]], align 1
-; LE-NEXT: ret i64 [[TMP0]]
-;
-; BE-LABEL: @load64_farLoads(
-; BE-NEXT: entry:
-; BE-NEXT: [[TMP0:%.*]] = load i8, ptr [[PTR:%.*]], align 1
-; BE-NEXT: [[CONV:%.*]] = zext i8 [[TMP0]] to i64
-; BE-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 1
-; BE-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1
-; BE-NEXT: [[CONV2:%.*]] = zext i8 [[TMP1]] to i64
-; BE-NEXT: [[SHL:%.*]] = shl i64 [[CONV2]], 8
-; BE-NEXT: [[OR:%.*]] = or i64 [[CONV]], [[SHL]]
-; BE-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 2
-; BE-NEXT: [[TMP2:%.*]] = load i8, ptr [[ARRAYIDX3]], align 1
-; BE-NEXT: [[CONV4:%.*]] = zext i8 [[TMP2]] to i64
-; BE-NEXT: [[SHL5:%.*]] = shl i64 [[CONV4]], 16
-; BE-NEXT: [[OR6:%.*]] = or i64 [[OR]], [[SHL5]]
-; BE-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 3
-; BE-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX7]], align 1
-; BE-NEXT: [[CONV8:%.*]] = zext i8 [[TMP3]] to i64
-; BE-NEXT: [[SHL9:%.*]] = shl i64 [[CONV8]], 24
-; BE-NEXT: [[OR10:%.*]] = or i64 [[OR6]], [[SHL9]]
-; BE-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 4
-; BE-NEXT: [[TMP4:%.*]] = load i8, ptr [[ARRAYIDX11]], align 1
-; BE-NEXT: [[CONV12:%.*]] = zext i8 [[TMP4]] to i64
-; BE-NEXT: [[SHL13:%.*]] = shl i64 [[CONV12]], 32
-; BE-NEXT: [[OR14:%.*]] = or i64 [[OR10]], [[SHL13]]
-; BE-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 5
-; BE-NEXT: [[TMP5:%.*]] = load i8, ptr [[ARRAYIDX15]], align 1
-; BE-NEXT: [[CONV16:%.*]] = zext i8 [[TMP5]] to i64
-; BE-NEXT: [[SHL17:%.*]] = shl i64 [[CONV16]], 40
-; BE-NEXT: [[OR18:%.*]] = or i64 [[OR14]], [[SHL17]]
-; BE-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 6
-; BE-NEXT: [[TMP6:%.*]] = load i8, ptr [[ARRAYIDX19]], align 1
-; BE-NEXT: [[CONV20:%.*]] = zext i8 [[TMP6]] to i64
-; BE-NEXT: [[SHL21:%.*]] = shl i64 [[CONV20]], 48
-; BE-NEXT: [[OR22:%.*]] = or i64 [[OR18]], [[SHL21]]
-; BE-NEXT: [[ARRAYIDX23:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i64 7
-; BE-NEXT: [[TMP7:%.*]] = load i8, ptr [[ARRAYIDX23]], align 1
-; BE-NEXT: [[CONV24:%.*]] = zext i8 [[TMP7]] to i64
-; BE-NEXT: [[SHL25:%.*]] = shl i64 [[CONV24]], 56
-; BE-NEXT: [[OR26:%.*]] = or i64 [[OR22]], [[SHL25]]
-; BE-NEXT: ret i64 [[OR26]]
-;
; ALL-LABEL: @load64_farLoads(
; ALL-NEXT: entry:
; ALL-NEXT: [[TMP0:%.*]] = load i8, ptr [[PTR:%.*]], align 1
@@ -1322,32 +1059,6 @@ entry:
}
define i32 @loadCombine_4consecutive_metadata(ptr %p, ptr %pstr) {
-; LE-LABEL: @loadCombine_4consecutive_metadata(
-; LE-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1, !alias.scope !0
-; LE-NEXT: store i32 25, ptr [[PSTR:%.*]], align 4, !noalias !0
-; LE-NEXT: ret i32 [[L1]]
-;
-; BE-LABEL: @loadCombine_4consecutive_metadata(
-; BE-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
-; BE-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
-; BE-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
-; BE-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1, !alias.scope !0
-; BE-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1, !alias.scope !0
-; BE-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1, !alias.scope !0
-; BE-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1, !alias.scope !0
-; BE-NEXT: store i32 25, ptr [[PSTR:%.*]], align 4, !noalias !0
-; BE-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32
-; BE-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32
-; BE-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32
-; BE-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32
-; BE-NEXT: [[S2:%.*]] = shl i32 [[E2]], 8
-; BE-NEXT: [[S3:%.*]] = shl i32 [[E3]], 16
-; BE-NEXT: [[S4:%.*]] = shl i32 [[E4]], 24
-; BE-NEXT: [[O1:%.*]] = or i32 [[E1]], [[S2]]
-; BE-NEXT: [[O2:%.*]] = or i32 [[O1]], [[S3]]
-; BE-NEXT: [[O3:%.*]] = or i32 [[O2]], [[S4]]
-; BE-NEXT: ret i32 [[O3]]
-;
; ALL-LABEL: @loadCombine_4consecutive_metadata(
; ALL-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
; ALL-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
More information about the llvm-commits
mailing list