[PATCH] D134718: [LegalizeTypes] Use getVectorElementCount to avoid crash of scalable vector.
Jianjian Guan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 28 00:00:10 PDT 2022
jacquesguan updated this revision to Diff 463446.
jacquesguan added a comment.
Herald added subscribers: pcwang-thead, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb.
Address comment.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134718/new/
https://reviews.llvm.org/D134718
Files:
llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
Index: llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
+++ llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
@@ -940,3 +940,15 @@
%r = extractelement <vscale x 32 x i32> %v, i32 %idx
ret i32 %r
}
+
+define i64 @extractelt_nxv16i64_0(<vscale x 16 x i64> %v) {
+; CHECK-LABEL: extractelt_nxv16i64_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e32, m8, ta, mu
+; CHECK-NEXT: vslidedown.vi v16, v8, 1
+; CHECK-NEXT: vmv.x.s a1, v16
+; CHECK-NEXT: vmv.x.s a0, v8
+; CHECK-NEXT: ret
+ %r = extractelement <vscale x 16 x i64> %v, i32 0
+ ret i64 %r
+}
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
@@ -208,7 +208,7 @@
void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
SDValue &Hi) {
SDValue OldVec = N->getOperand(0);
- unsigned OldElts = OldVec.getValueType().getVectorNumElements();
+ ElementCount OldEltCount = OldVec.getValueType().getVectorElementCount();
EVT OldEltVT = OldVec.getValueType().getVectorElementType();
SDLoc dl(N);
@@ -222,14 +222,13 @@
// the input vector. If so, extend the elements of the input vector to the
// same bitwidth as the result before expanding.
assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!");
- EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts);
+ EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldEltCount);
OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0));
}
- SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
- EVT::getVectorVT(*DAG.getContext(),
- NewVT, 2*OldElts),
- OldVec);
+ SDValue NewVec = DAG.getNode(
+ ISD::BITCAST, dl,
+ EVT::getVectorVT(*DAG.getContext(), NewVT, OldEltCount * 2), OldVec);
// Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector.
SDValue Idx = N->getOperand(1);
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