[PATCH] D134745: [LV][Metadata] Add loop.interleave.enable for loop vectorizer

[Yueh-Ting (eop) Chen via Phabricator via llvm-commits]

eopXD created this revision.
eopXD added reviewers: sdesmalen, paulwalker-arm, fhahn, reames, hfinkel.
Herald added subscribers: frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
Herald added a project: All.
eopXD requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, pcwang-thead, MaskRay.
Herald added projects: clang, LLVM.

Adding this metadata allows {loop.vectorize.enable, false} to be used
without disabling the whole pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D134745

Files:
  clang/lib/CodeGen/CGLoopInfo.cpp
  clang/lib/CodeGen/CGLoopInfo.h
  clang/test/CodeGenCXX/pragma-loop-predicate.cpp
  clang/test/CodeGenCXX/pragma-loop-safety.cpp
  clang/test/CodeGenCXX/pragma-loop.cpp
  llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
  llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
  llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
  llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
  llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
  llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
  llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll
  llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
  llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
  llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
  llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
  llvm/test/Transforms/LoopVectorize/no_switch.ll
  llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
  llvm/test/Transforms/LoopVectorize/nounroll.ll
  llvm/test/Transforms/LoopVectorize/optsize.ll
  llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
  llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
  llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
  llvm/test/Transforms/LoopVectorize/vect.omp.persistence.ll
  llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
  llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
  llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
  llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
  llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll

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