[PATCH] D134022: [AArch64] Insert/Extract of bitcast patterns

[Alexander Kornienko via Phabricator via llvm-commits]

alexfh added a comment.

Looks like some of our code gets miscompiled on aarch64 after this change. I can't yet share an isolated test, but this is the difference in the assembly:

  @@ -109,11 +109,10 @@
          ldr     x10, [sp, #48]
          stp     x8, x9, [sp, #64]
          blr     x10
  -       scvtf   d0, w0
          mov     w8, #1
  -       fmov    x9, d0
  +       scvtf   d1, w0
          dup     v0.2d, x8
  -       mov     v0.d[0], x9
  +       fmov    d0, d1
   .LBB1_5:
          adrp    x1, .L.str.3
          add     x1, x1, :lo12:.L.str.3

The code misbehaves only on arm with -O2 and higher (works fine on arm with -O1 and on x86-64 with any optimization level) and I don't see any undefined behavior in it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134022/new/

https://reviews.llvm.org/D134022