[PATCH] D134720: [RISCV][NFC] Add test for extractelt of vector types that should be splitted.
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 27 07:21:36 PDT 2022
reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.
LGTM w/suggestion.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll:603
+}
+
+define double @extractelt_nxv16f64_idx(<vscale x 16 x double> %v, i32 signext %idx) {
----------------
Can you add a test for vscale x 16 - 1 as the index? (Or anything else guaranteed to land in the second lmul8 register after splitting.)
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D134720/new/
https://reviews.llvm.org/D134720
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