[llvm] 823ce6a - [LoongArch] Add some comments for expand pseudo-inst pass. NFC

Weining Lu via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 27 05:26:38 PDT 2022


Author: wanglei
Date: 2022-09-27T20:26:07+08:00
New Revision: 823ce6ad18d3c216a411ca3d98a4fcc9cd11d278

URL: https://github.com/llvm/llvm-project/commit/823ce6ad18d3c216a411ca3d98a4fcc9cd11d278
DIFF: https://github.com/llvm/llvm-project/commit/823ce6ad18d3c216a411ca3d98a4fcc9cd11d278.diff

LOG: [LoongArch] Add some comments for expand pseudo-inst pass. NFC

Differential Revision: https://reviews.llvm.org/D134708

Added: 
    

Modified: 
    llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp b/llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
index a7a5cd33fec0a..08b3a0faa05a8 100644
--- a/llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
@@ -131,6 +131,9 @@ bool LoongArchPreRAExpandPseudo::expandPcalau12iInstPair(
 bool LoongArchPreRAExpandPseudo::expandLoadAddressPcrel(
     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
     MachineBasicBlock::iterator &NextMBBI) {
+  // Code Sequence:
+  // pcalau12i $rd, %pc_hi20(sym)
+  // addi.w/d $rd, $rd, %pc_lo12(sym)
   MachineFunction *MF = MBB.getParent();
   const auto &STI = MF->getSubtarget<LoongArchSubtarget>();
   unsigned SecondOpcode = STI.is64Bit() ? LoongArch::ADDI_D : LoongArch::ADDI_W;
@@ -141,6 +144,9 @@ bool LoongArchPreRAExpandPseudo::expandLoadAddressPcrel(
 bool LoongArchPreRAExpandPseudo::expandLoadAddressGot(
     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
     MachineBasicBlock::iterator &NextMBBI) {
+  // Code Sequence:
+  // pcalau12i $rd, %got_pc_hi20(sym)
+  // ld.w/d $rd, $rd, %got_pc_lo12(sym)
   MachineFunction *MF = MBB.getParent();
   const auto &STI = MF->getSubtarget<LoongArchSubtarget>();
   unsigned SecondOpcode = STI.is64Bit() ? LoongArch::LD_D : LoongArch::LD_W;


        


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