[PATCH] D134639: [VP][RISCV] Add vp.maxnum and vp.minnum intrinsics and RISC-V support.

[Yeting Kuo via Phabricator via llvm-commits]

fakepaper56 updated this revision to Diff 463086.
fakepaper56 added a comment.

Use right IEEE-754 terminology.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134639/new/

https://reviews.llvm.org/D134639

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/IR/VPIntrinsics.def
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
  llvm/unittests/IR/VPIntrinsicTest.cpp

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