[PATCH] D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 26 17:55:17 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2490
+ if (!Node->isMachineOpcode())
+ return SDValue{};
+ const MCInstrDesc &MCID = TII.get(Node->getMachineOpcode());
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Can we use `SDValue()` for consistency with the vast majority of SelectionDAG code
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Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2548
+ // Check whether VL operands are the same. Return common non-constant VL.
+ SDValue VL = getVLOperand(*Range.begin(), TII);
+ if (all_of(drop_begin(Range),
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I don't think you can assume the using instruction VL is relative to the same SEW/LMUL as the splat. There could have been a bitcast between them that changed the element size. Bitcasts don't generate code. I think insert_subvector/extract_subvector can also change the type without creating any code. Mainly for fractional LMULs.
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https://reviews.llvm.org/D130895/new/
https://reviews.llvm.org/D130895
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