[llvm] ab3779a - [MustExecute] Add additional test for PR57780 (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2022-09-26T15:03:15+02:00
New Revision: ab3779a667bf1f408a100a8b151cffc68b71a555

URL: https://github.com/llvm/llvm-project/commit/ab3779a667bf1f408a100a8b151cffc68b71a555
DIFF: https://github.com/llvm/llvm-project/commit/ab3779a667bf1f408a100a8b151cffc68b71a555.diff

LOG: [MustExecute] Add additional test for PR57780 (NFC)

Added: 
    llvm/test/Analysis/MustExecute/pr57780.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Analysis/MustExecute/pr57780.ll b/llvm/test/Analysis/MustExecute/pr57780.ll
new file mode 100644
index 0000000000000..a7b47a1fb8b5f
--- /dev/null
+++ b/llvm/test/Analysis/MustExecute/pr57780.ll
@@ -0,0 +1,55 @@
+; RUN: opt -disable-output -print-mustexecute < %s 2>&1 | FileCheck %s
+
+ at c = global i16 0, align 2
+
+; FIXME: miscompile
+; CHECK-LABEL: define void @latch_cycle_irreducible
+; CHECK: store i16 5, ptr @c, align 2 ; (mustexec in: loop)
+define void @latch_cycle_irreducible() {
+entry:
+  br label %loop
+
+loop:                                             ; preds = %loop.latch, %entry
+  %v = phi i32 [ 10, %entry ], [ 0, %loop.latch ]
+  %c = icmp eq i32 %v, 0
+  br i1 %c, label %loop.exit, label %loop.cont
+
+loop.cont:                                        ; preds = %loop
+  br i1 false, label %loop.irreducible, label %loop.latch
+
+loop.irreducible:                                 ; preds = %loop.latch, %loop.cont
+  store i16 5, ptr @c, align 2
+  br label %loop.latch
+
+loop.latch:                                       ; preds = %loop.irreducible, %loop.cont
+  br i1 false, label %loop.irreducible, label %loop
+
+loop.exit:                                        ; preds = %loop
+  ret void
+}
+
+; FIXME: miscompile
+; CHECK-LABEL: define void @latch_cycle_reducible
+; CHECK: store i16 5, ptr @c, align 2 ; (mustexec in: loop)
+define void @latch_cycle_reducible() {
+entry:
+  br label %loop
+
+loop:                                             ; preds = %loop.latch, %entry
+  %v = phi i32 [ 10, %entry ], [ 0, %loop.latch ]
+  %c = icmp eq i32 %v, 0
+  br i1 %c, label %loop.exit, label %loop2
+
+loop2:                                            ; preds = %loop.latch, %loop
+  br i1 false, label %loop2.cont, label %loop.latch
+
+loop2.cont:                                       ; preds = %loop2
+  store i16 5, ptr @c, align 2
+  br label %loop.latch
+
+loop.latch:                                       ; preds = %loop2.cont, %loop2
+  br i1 false, label %loop2, label %loop
+
+loop.exit:                                        ; preds = %loop
+  ret void
+}