[PATCH] D134365: [LoongArch] Add support for llvm.trap and llvm.debugtrap
Xi Ruoyao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 26 05:57:08 PDT 2022
xry111 added a comment.
RISC-V uses an undefined instruction for `llvm.trap`. AArch64 uses different break codes for `trap` and `debugtrap`.
I think we need to either request an instruction "must be undefined", or request a documentation of break codes. Note that `break 7` is already used for a SIGFPE (when `-mcheck-zero-division`) and the number `7` is not documented anywhere AFAIK...
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D134365/new/
https://reviews.llvm.org/D134365
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