[PATCH] D132559: [AArch64] Add support for 128-bit non temporal loads.

[Florian Hahn via Phabricator via llvm-commits]

fhahn added a comment.

This should be fine now, could you rebase this patch on top of  D133421 <https://reviews.llvm.org/D133421>?  Codegen of `test_ldnp_v33f64` should be improved by this, right?



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:801
   setOperationAction(ISD::LOAD, MVT::v4i64, Custom);
+  // LDNP lower than 256
+  setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
----------------
Would be good to use the more descriptive comment from above, just for 128 bits.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:5384
+  }
   if (LoadNode->getMemoryVT() == MVT::i64x8) {
     SmallVector<SDValue, 8> Ops;
----------------
nit: would be good to have a newline before this line..


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:20636
     // Handle lowering 256 bit non temporal loads into LDNP.
-    if (LoadNode->isNonTemporal() && MemVT.getSizeInBits() == 256u &&
+    if (LoadNode->isNonTemporal() &&
+        MemVT.getSizeInBits() == 256u &&
----------------
unrelated change?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132559/new/

https://reviews.llvm.org/D132559