[llvm] f89f099 - [LoongArch] Support llvm.thread.pointer
Weining Lu via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 25 18:59:38 PDT 2022
Author: WANG Xuerui
Date: 2022-09-26T09:56:42+08:00
New Revision: f89f0990db44b390cbe73ccf8a8d853adf674a73
URL: https://github.com/llvm/llvm-project/commit/f89f0990db44b390cbe73ccf8a8d853adf674a73
DIFF: https://github.com/llvm/llvm-project/commit/f89f0990db44b390cbe73ccf8a8d853adf674a73.diff
LOG: [LoongArch] Support llvm.thread.pointer
For `__builtin_thread_pointer` to work, among other things.
Similar to D76828 for RISCV.
Differential Revision: https://reviews.llvm.org/D134368
Added:
llvm/test/CodeGen/LoongArch/thread-pointer.ll
Modified:
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
llvm/lib/Target/LoongArch/LoongArchISelLowering.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index d73f7f8da482..a13ac47b14c1 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -60,6 +60,8 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
setOperationAction({ISD::GlobalAddress, ISD::ConstantPool}, GRLenVT, Custom);
+ setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
+
setOperationAction(ISD::EH_DWARF_CFA, MVT::i32, Custom);
if (Subtarget.is64Bit())
setOperationAction(ISD::EH_DWARF_CFA, MVT::i64, Custom);
@@ -176,6 +178,8 @@ SDValue LoongArchTargetLowering::LowerOperation(SDValue Op,
return lowerEH_DWARF_CFA(Op, DAG);
case ISD::GlobalAddress:
return lowerGlobalAddress(Op, DAG);
+ case ISD::INTRINSIC_WO_CHAIN:
+ return lowerINTRINSIC_WO_CHAIN(Op, DAG);
case ISD::SHL_PARTS:
return lowerShiftLeftParts(Op, DAG);
case ISD::SRA_PARTS:
@@ -310,6 +314,20 @@ SDValue LoongArchTargetLowering::lowerGlobalAddress(SDValue Op,
report_fatal_error("Unable to lowerGlobalAddress");
}
+SDValue LoongArchTargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op,
+ SelectionDAG &DAG) const {
+ unsigned IntNo = Op.getConstantOperandVal(0);
+
+ switch (IntNo) {
+ default:
+ return SDValue(); // Don't custom lower most intrinsics.
+ case Intrinsic::thread_pointer: {
+ EVT PtrVT = getPointerTy(DAG.getDataLayout());
+ return DAG.getRegister(LoongArch::R2, PtrVT);
+ }
+ }
+}
+
SDValue LoongArchTargetLowering::lowerShiftLeftParts(SDValue Op,
SelectionDAG &DAG) const {
SDLoc DL(Op);
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 5e7dfee87217..fa70ae450fa1 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -143,6 +143,7 @@ class LoongArchTargetLowering : public TargetLowering {
SDValue lowerBITCAST(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const;
+ SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
bool isFPImmLegal(const APFloat &Imm, EVT VT,
bool ForCodeSize) const override;
diff --git a/llvm/test/CodeGen/LoongArch/thread-pointer.ll b/llvm/test/CodeGen/LoongArch/thread-pointer.ll
new file mode 100644
index 000000000000..805709e61c54
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/thread-pointer.ll
@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s --mtriple=loongarch32 | FileCheck %s
+; RUN: llc < %s --mtriple=loongarch64 | FileCheck %s
+
+declare ptr @llvm.thread.pointer()
+
+define ptr @thread_pointer() nounwind {
+; CHECK-LABEL: thread_pointer:
+; CHECK: # %bb.0:
+; CHECK-NEXT: move $a0, $tp
+; CHECK-NEXT: ret
+ %1 = tail call ptr @llvm.thread.pointer()
+ ret ptr %1
+}
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