[PATCH] D134586: [VP][RISCV] Add vp.ceil and RISC-V support

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll:14
+; CHECK-NEXT:    flh ft0, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
+; CHECK-NEXT:    vfabs.v v9, v8
----------------
This is using the wrong AVL and the mask has been ignored.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134586/new/

https://reviews.llvm.org/D134586