[PATCH] D134463: [AMDGPU] Use V_PERM to match buildvectors when inputs are not canonicalized (i.e. can't use V_PACK)

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2609-2610
 def : GCNPat <
   (v2f16 (DivergentBinFrag<build_vector> (f16 SReg_32:$src0), (f16 SReg_32:$src1))),
   (v2f16 (V_LSHL_OR_B32_e64 SReg_32:$src1, (i32 16), (i32 (V_AND_B32_e64 (i32 (V_MOV_B32_e32 (i32 0xffff))), SReg_32:$src0))))
 >;
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arsenm wrote:
> Should we just replace this?
This is looking dead


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Comment at: llvm/test/CodeGen/AMDGPU/v_perm_non_canon.ll:3
+; RUN: llc -march=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
+
+define amdgpu_kernel void @transpose_fp16(<2 x half>* %x0, <2 x half>* %x1, <2 x half>* %y0, <2 x half>* %y1) {
----------------
Probably should move this in with vector_shuffle.packed.ll


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Comment at: llvm/test/CodeGen/AMDGPU/v_perm_non_canon.ll:4
+
+define amdgpu_kernel void @transpose_fp16(<2 x half>* %x0, <2 x half>* %x1, <2 x half>* %y0, <2 x half>* %y1) {
+; GCN-LABEL: transpose_fp16:
----------------
Should use addrspace(1)*


================
Comment at: llvm/test/CodeGen/AMDGPU/v_perm_non_canon.ll:36
+  ret void
+}
----------------
Separate functions for each tested shuffle.

Also needs versions using i16.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D134463/new/

https://reviews.llvm.org/D134463