[llvm] c442698 - [NFC] update_llc_test_checks llvm/test/CodeGen/ARM/memcpy-inline.ll
Guillaume Chatelet via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 23 02:00:51 PDT 2022
Author: Guillaume Chatelet
Date: 2022-09-23T09:00:38Z
New Revision: c442698091965c736724fe30388a3e64446fb114
URL: https://github.com/llvm/llvm-project/commit/c442698091965c736724fe30388a3e64446fb114
DIFF: https://github.com/llvm/llvm-project/commit/c442698091965c736724fe30388a3e64446fb114.diff
LOG: [NFC] update_llc_test_checks llvm/test/CodeGen/ARM/memcpy-inline.ll
Added:
Modified:
llvm/test/CodeGen/ARM/memcpy-inline.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/ARM/memcpy-inline.ll b/llvm/test/CodeGen/ARM/memcpy-inline.ll
index 4e6627cd7999a..8761e43866167 100644
--- a/llvm/test/CodeGen/ARM/memcpy-inline.ll
+++ b/llvm/test/CodeGen/ARM/memcpy-inline.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s
; RUN: llc < %s -mtriple=thumbv6m-apple-ios -mcpu=cortex-m0 -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s -check-prefix=CHECK-T1
%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
@@ -14,103 +15,135 @@
@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
define i32 @t0() {
-entry:
; CHECK-LABEL: t0:
-; CHECK: vldr [[REG1:d[0-9]+]],
-; CHECK: vstr [[REG1]],
-; CHECK-T1-LABEL: t0:
-; CHECK-T1: ldrb [[TREG1:r[0-9]]],
-; CHECK-T1: strb [[TREG1]],
-; CHECK-T1: ldrh [[TREG2:r[0-9]]],
-; CHECK-T1: strh [[TREG2]]
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: movw r0, :lower16:(L_dst$non_lazy_ptr-(LPC0_0+4))
+; CHECK-NEXT: movt r0, :upper16:(L_dst$non_lazy_ptr-(LPC0_0+4))
+; CHECK-NEXT: LPC0_0:
+; CHECK-NEXT: add r0, pc
+; CHECK-NEXT: ldr r0, [r0]
+; CHECK-NEXT: movw r1, :lower16:(L_src$non_lazy_ptr-(LPC0_1+4))
+; CHECK-NEXT: movt r1, :upper16:(L_src$non_lazy_ptr-(LPC0_1+4))
+; CHECK-NEXT: LPC0_1:
+; CHECK-NEXT: add r1, pc
+; CHECK-NEXT: ldr r1, [r1]
+; CHECK-NEXT: ldr.w r2, [r1, #7]
+; CHECK-NEXT: str.w r2, [r0, #7]
+; CHECK-NEXT: vldr d16, [r1]
+; CHECK-NEXT: vstr d16, [r0]
+; CHECK-NEXT: movs r0, #0
+; CHECK-NEXT: bx lr
+entry:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false)
ret i32 0
}
define void @t1(i8* nocapture %C) nounwind {
-entry:
; CHECK-LABEL: t1:
-; CHECK: movs [[INC:r[0-9]+]], #15
-; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1], [[INC]]
-; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0], [[INC]]
-; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
-; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
-; CHECK-T1-LABEL: t1:
-; CHECK-T1: bl _memcpy
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: movw r1, :lower16:(L_.str1-(LPC1_0+4))
+; CHECK-NEXT: movt r1, :upper16:(L_.str1-(LPC1_0+4))
+; CHECK-NEXT: LPC1_0:
+; CHECK-NEXT: add r1, pc
+; CHECK-NEXT: movs r2, #15
+; CHECK-NEXT: vld1.8 {d16, d17}, [r1], r2
+; CHECK-NEXT: vst1.8 {d16, d17}, [r0], r2
+; CHECK-NEXT: vld1.8 {d16, d17}, [r1]
+; CHECK-NEXT: vst1.8 {d16, d17}, [r0]
+; CHECK-NEXT: bx lr
+entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i1 false)
ret void
}
define void @t2(i8* nocapture %C) nounwind {
-entry:
; CHECK-LABEL: t2:
-; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]!
-; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]!
-; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
-; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]!
-; CHECK: movw [[REG2:r[0-9]+]], #16716
-; CHECK: movt [[REG2:r[0-9]+]], #72
-; CHECK: str [[REG2]], [r0]
-; CHECK-T1-LABEL: t2:
-; CHECK-T1: bl _memcpy
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: movw r1, :lower16:(L_.str2-(LPC2_0+4))
+; CHECK-NEXT: movt r1, :upper16:(L_.str2-(LPC2_0+4))
+; CHECK-NEXT: LPC2_0:
+; CHECK-NEXT: add r1, pc
+; CHECK-NEXT: vld1.8 {d16, d17}, [r1]!
+; CHECK-NEXT: vst1.8 {d16, d17}, [r0]!
+; CHECK-NEXT: vld1.64 {d16, d17}, [r1]
+; CHECK-NEXT: vst1.8 {d16, d17}, [r0]!
+; CHECK-NEXT: movw r1, #16716
+; CHECK-NEXT: movt r1, #72
+; CHECK-NEXT: str r1, [r0]
+; CHECK-NEXT: bx lr
+entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i1 false)
ret void
}
define void @t3(i8* nocapture %C) nounwind {
-entry:
; CHECK-LABEL: t3:
-; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]!
-; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]!
-; CHECK: vldr d{{[0-9]+}}, [r1]
-; CHECK: vst1.8 {d{{[0-9]+}}}, [r0]
-; CHECK-T1-LABEL: t3:
-; CHECK-T1: bl _memcpy
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: movw r1, :lower16:(L_.str3-(LPC3_0+4))
+; CHECK-NEXT: movt r1, :upper16:(L_.str3-(LPC3_0+4))
+; CHECK-NEXT: LPC3_0:
+; CHECK-NEXT: add r1, pc
+; CHECK-NEXT: vld1.8 {d16, d17}, [r1]!
+; CHECK-NEXT: vst1.8 {d16, d17}, [r0]!
+; CHECK-NEXT: vldr d16, [r1]
+; CHECK-NEXT: vst1.8 {d16}, [r0]
+; CHECK-NEXT: bx lr
+entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i1 false)
ret void
}
define void @t4(i8* nocapture %C) nounwind {
-entry:
; CHECK-LABEL: t4:
-; CHECK: vld1.64 {[[REG3:d[0-9]+]], [[REG4:d[0-9]+]]}, [r1]
-; CHECK: vst1.8 {[[REG3]], [[REG4]]}, [r0]!
-; CHECK: strh [[REG5:r[0-9]+]], [r0]
-; CHECK-T1-LABEL: t4:
-; CHECK-T1: bl _memcpy
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: movw r1, :lower16:(L_.str4-(LPC4_0+4))
+; CHECK-NEXT: movt r1, :upper16:(L_.str4-(LPC4_0+4))
+; CHECK-NEXT: LPC4_0:
+; CHECK-NEXT: add r1, pc
+; CHECK-NEXT: vld1.64 {d16, d17}, [r1]
+; CHECK-NEXT: vst1.8 {d16, d17}, [r0]!
+; CHECK-NEXT: movs r1, #32
+; CHECK-NEXT: strh r1, [r0]
+; CHECK-NEXT: bx lr
+entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i1 false)
ret void
}
define void @t5(i8* nocapture %C) nounwind {
-entry:
; CHECK-LABEL: t5:
-; CHECK: movw [[REG5:r[0-9]+]], #21337
-; CHECK: movt [[REG5]], #84
-; CHECK: str.w [[REG5]], [r0, #3]
-; CHECK: movw [[REG7:r[0-9]+]], #18500
-; CHECK: movt [[REG7:r[0-9]+]], #22866
-; CHECK: str [[REG7]]
-; CHECK-T1-LABEL: t5:
-; CHECK-T1: bl _memcpy
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: movw r1, #21337
+; CHECK-NEXT: movt r1, #84
+; CHECK-NEXT: str.w r1, [r0, #3]
+; CHECK-NEXT: movw r1, #18500
+; CHECK-NEXT: movt r1, #22866
+; CHECK-NEXT: str r1, [r0]
+; CHECK-NEXT: bx lr
+entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i1 false)
ret void
}
define void @t6() nounwind {
-entry:
; CHECK-LABEL: t6:
-; CHECK: vldr [[REG9:d[0-9]+]], [r0]
-; CHECK: vstr [[REG9]], [r1]
-; CHECK: adds r1, #6
-; CHECK: adds r0, #6
-; CHECK: vld1.16
-; CHECK: vst1.16
-; CHECK-T1-LABEL: t6:
-; CHECK-T1: movs [[TREG5:r[0-9]]],
-; CHECK-T1: strh [[TREG5]],
-; CHECK-T1: ldr [[TREG6:r[0-9]]],
-; CHECK-T1: str [[TREG6]]
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: movw r0, :lower16:(L_.str6-(LPC6_0+4))
+; CHECK-NEXT: movt r0, :upper16:(L_.str6-(LPC6_0+4))
+; CHECK-NEXT: LPC6_0:
+; CHECK-NEXT: add r0, pc
+; CHECK-NEXT: vldr d16, [r0]
+; CHECK-NEXT: movw r1, :lower16:(_spool.splbuf-(LPC6_1+4))
+; CHECK-NEXT: movt r1, :upper16:(_spool.splbuf-(LPC6_1+4))
+; CHECK-NEXT: LPC6_1:
+; CHECK-NEXT: add r1, pc
+; CHECK-NEXT: vstr d16, [r1]
+; CHECK-NEXT: adds r1, #6
+; CHECK-NEXT: adds r0, #6
+; CHECK-NEXT: vld1.16 {d16}, [r0]
+; CHECK-NEXT: vst1.16 {d16}, [r1]
+; CHECK-NEXT: bx lr
+entry:
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i1 false)
ret void
}
@@ -118,13 +151,12 @@ entry:
%struct.Foo = type { i32, i32, i32, i32 }
define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind {
-entry:
; CHECK-LABEL: t7:
-; CHECK: vld1.32
-; CHECK: vst1.32
-; CHECK-T1-LABEL: t7:
-; CHECK-T1: ldr
-; CHECK-T1: str
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: vld1.32 {d16, d17}, [r1]
+; CHECK-NEXT: vst1.32 {d16, d17}, [r0]
+; CHECK-NEXT: bx lr
+entry:
%0 = bitcast %struct.Foo* %a to i8*
%1 = bitcast %struct.Foo* %b to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
@@ -133,3 +165,5 @@ entry:
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-T1: {{.*}}
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