[PATCH] D76883: [AMDGPU] Implement CFI for CSR spills

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:1709
+
+    if (CS.isSpilledToReg()) {
+      BuildMI(MBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
----------------
When do we have this case?
Can you point me to a test if it already exists?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D76883/new/

https://reviews.llvm.org/D76883