[PATCH] D133584: [DAGCombiner] [AMDGPU] Allow vector loads in MatchLoadCombine

[Jeffrey Byrnes via Phabricator via llvm-commits]

jrbyrnes added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:7878-7880
 calculateByteProvider(SDValue Op, unsigned Index, unsigned Depth,
-                      bool Root = false) {
+                      Optional<uint64_t> VectorIndex,
+                      unsigned StartingIndex = 0, bool Root = false) {
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spatel wrote:
> I added more tests with:
> ef7d61d67cb9
> ...so please update the auto-generated checks there.
> 
> It might help to add some test or code comments to explain the transforms in those examples. Just looking at this code, I can't tell what the relationship is between the 3 index parameters.
Thanks for taking a look! I updated the tests you added, please let me know if you need additional info on the results.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D133584/new/

https://reviews.llvm.org/D133584