[PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy to scalar operands of buffer instructions.

[krishna chaitanya sankisa via Phabricator via llvm-commits]

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In si-fix-sgpr-copies pass, lowering of COPY instruction (vgpr to sgpr) to VALU or to v_readfirstlane_b32 is done. It is decided based on the SALU instructions users of result of COPY. It misses the case where the use of result of COPY need to be scalar register only. Example: In buffer instructions, there are scalar operands (sOffset) which will only accept scalar registers.

This change lowers the vgpr2sgpr copies to use v_readfirstlane_b32, if the result of copy is used by operands of buffer instructions which needs to be scalar registers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D134423

Files:
  llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
  llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-buf.ll
  llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll

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