[PATCH] D119115: [RISCV] Improve insert_vector_elt for fixed mask registers.

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 21 15:22:37 PDT 2022


reames added a comment.

In D119115#3805149 <https://reviews.llvm.org/D119115#3805149>, @jacquesguan wrote:

> In D119115#3790207 <https://reviews.llvm.org/D119115#3790207>, @reames wrote:
>
>> I don't think we should land this patch.  It involves moving a value from vector to scalar and then back again.  The vector to scalar domain crossing is likely to be expensive on at least some real hardware.
>>
>> We can probably do better by forming the bitmask on the vector side entirely.  Given an index in a scalar register, we can produce a single bit mask by comparing a vid vector against that index.  With that, we can construct a vmerge with a scalar operand to set or clear the desired bit in the mask.
>
> I don't understand your last sentence well, I think that vmerge could not be used for mask type, so how to only merge the desired bit?

You're right on the vmerge point.  I made this same mistake in another review, caught it, and then didn't realize I'd already posted this comment.  Sorry for the confusion.

However, you can replace the vmerge in the above with vmandn and a vmor.

So, code sequence looks something like:

  v2 = incoming masking
  x1 = incoming index
  x2 = incoming bool (elt)
  v1 = vid
  v0 = vseteq v1, <idx>
  v2 = vmandn v2, v0 // original mask with lane cleared
  v3 = vmv.v.x x2
  v3 = vseteq v3, 1
  v3 = vmand v3, v0
  v2 = vmor v2, v3

OR

  x1 = incoming index
  x2 = incoming bool (elt)
  v1 = vid
  v0 = vseteq v1, <idx>
  v2 = vmandn v2, v0 // original mask with lane cleared
  bneqz x2, skip
  v0 = vxor v3, v3
  skip: 
  v2 = vmor v2, v0

I'm not claiming this is optimal codegen; there may be better.  This is just what occurs to me with a bit of thought.


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