[llvm] 053df6c - [NFC][AMDGPU] Pre-commit test for D132837.

[Thomas Symalla via llvm-commits]

Author: Thomas Symalla
Date: 2022-09-21T10:16:29+02:00
New Revision: 053df6ccafbb00d242fbc36ef9d4776dfc3552f3

URL: https://github.com/llvm/llvm-project/commit/053df6ccafbb00d242fbc36ef9d4776dfc3552f3
DIFF: https://github.com/llvm/llvm-project/commit/053df6ccafbb00d242fbc36ef9d4776dfc3552f3.diff

LOG: [NFC][AMDGPU] Pre-commit test for D132837.

Pre-commit an additional fmac test for D132837.

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll b/llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
index 74009adaaeb21..d9f19da1a2714 100644
--- a/llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
+++ b/llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
@@ -210,6 +210,25 @@ define float @fmac_sequence_innermost_fmul(float %a, float %b, float %c, float %
   ret float %t5
 }
 
+define float @fmac_sequence_innermost_fmul_swapped_operands(float %a, float %b, float %c, float %d, float %e, float %f, float %g) #0 {
+; GCN-LABEL: fmac_sequence_innermost_fmul_swapped_operands:
+; GCN:       ; %bb.0:
+; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT:    s_waitcnt_vscnt null, 0x0
+; GCN-NEXT:    v_mul_f32_e32 v2, v2, v3
+; GCN-NEXT:    v_fmac_f32_e32 v2, v0, v1
+; GCN-NEXT:    v_fmac_f32_e32 v2, v4, v5
+; GCN-NEXT:    v_add_f32_e32 v0, v6, v2
+; GCN-NEXT:    s_setpc_b64 s[30:31]
+  %t0 = fmul fast float %a, %b
+  %t1 = fmul fast float %c, %d
+  %t2 = fadd fast float %t0, %t1
+  %t3 = fmul fast float %e, %f
+  %t4 = fadd fast float %t2, %t3
+  %t5 = fadd fast float %g, %t4
+  ret float %t5
+}
+
 ; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
 declare float @llvm.maxnum.f32(float, float) #1