[PATCH] D134179: [NFC][RISCV] Move calculations of SDNode policy operand idx to a separate function
ShihPo Hung via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 20 10:37:16 PDT 2022
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3cd503f18161: [NFC][RISCV] Move calculations of SDNode policy operand idx to a separate… (authored by asi-sc, committed by arcbbb).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134179/new/
https://reviews.llvm.org/D134179
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Index: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -40,6 +40,22 @@
#include "RISCVGenSearchableTables.inc"
} // namespace llvm::RISCV
+static unsigned getLastNonGlueOrChainOpIdx(const SDNode *Node) {
+ assert(Node->getNumOperands() > 0 && "Node with no operands");
+ unsigned LastOpIdx = Node->getNumOperands() - 1;
+ if (Node->getOperand(LastOpIdx).getValueType() == MVT::Glue)
+ --LastOpIdx;
+ if (Node->getOperand(LastOpIdx).getValueType() == MVT::Other)
+ --LastOpIdx;
+ return LastOpIdx;
+}
+
+static unsigned getVecPolicyOpIdx(const SDNode *Node, const MCInstrDesc &MCID) {
+ assert(RISCVII::hasVecPolicyOp(MCID.TSFlags));
+ (void)MCID;
+ return getLastNonGlueOrChainOpIdx(Node);
+}
+
void RISCVDAGToDAGISel::PreprocessISelDAG() {
SelectionDAG::allnodes_iterator Position = CurDAG->allnodes_end();
@@ -2562,14 +2578,7 @@
bool IsTA = true;
if (RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags)) {
- // The last operand of the pseudo is the policy op, but we might have a
- // Glue operand last. We might also have a chain.
- TailPolicyOpIdx = N->getNumOperands() - 1;
- if (N->getOperand(*TailPolicyOpIdx).getValueType() == MVT::Glue)
- (*TailPolicyOpIdx)--;
- if (N->getOperand(*TailPolicyOpIdx).getValueType() == MVT::Other)
- (*TailPolicyOpIdx)--;
-
+ TailPolicyOpIdx = getVecPolicyOpIdx(N, MaskedMCID);
if (!(N->getConstantOperandVal(*TailPolicyOpIdx) &
RISCVII::TAIL_AGNOSTIC)) {
// Keep the true-masked instruction when there is no unmasked TU
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