[PATCH] D131246: [AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.
Phabricator via llvm-commits
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Mon Sep 19 14:32:24 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2e8817b90a9a: [AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis… (authored by Alexander Timofeev <alexander.timofeev at amd.com>).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D131246/new/
https://reviews.llvm.org/D131246
Files:
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
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