[PATCH] D131246: [AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.

Mon Sep 19 13:32:38 PDT 2022

alex-t updated this revision to Diff 461343.
alex-t added a comment.

MachineInstr deletion listener interface removed
SCC copies processing is done by the separate pas over the MIR

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131246/new/

https://reviews.llvm.org/D131246

Files:
  llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
  llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll

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