[PATCH] D133972: [AMDGPU] Fix size of SOPK instructions to 4 bytes

Anshil Gandhi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 19 10:44:53 PDT 2022


gandhi21299 added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll:5-9
+; CHECK: %bb.0  offset=00000000 size=0x6c
+; CHECK: %bb.1  offset=0000006c size=0x3c
+; CHECK: %bb.2  offset=000000a8 size=0x2c
+; CHECK: %bb.3  offset=000000d4 size=0
+; CHECK: %bb.4  offset=000000d4 size=0x28
----------------
arsenm wrote:
> For a function that does not require relaxation, how did it introduce a block with size 0?
It was first introduced due to the structurize CFG pass. I think it combines a sequence of instructions into a phi instruction.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133972/new/

https://reviews.llvm.org/D133972



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