[PATCH] D133972: [AMDGPU] Fix size of SOPK instructions to 4 bytes
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 19 06:17:39 PDT 2022
arsenm added inline comments.
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Comment at: llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll:1
+; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -debug-only=branch-relaxation %s -o - 2>&1 | FileCheck %s
+
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If you're going to rely on -debug-only, this needs REQUIRES: asserts
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Comment at: llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll:11
+; CHECK: foo:
+; Function Attrs: convergent noinline nounwind
+define void @foo(i32 %a, i32 %b, float %c, float %d) unnamed_addr #8 {
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Don't need attrs comment
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Comment at: llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll:12
+; Function Attrs: convergent noinline nounwind
+define void @foo(i32 %a, i32 %b, float %c, float %d) unnamed_addr #8 {
+; CHECK-NEXT: bb.0:
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I'm not seeing where there's a sopk instruction in this function
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Comment at: llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll:89-90
+; CHECK-NEXT: s_setpc_b64 s[30:31]
+ %18 = fadd reassoc nnan ninf nsz contract float %c, %d
+ %19 = fadd reassoc nnan ninf nsz contract float %18, %c
+ ret void
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Don't need all the instruction flags. Should also use named values
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D133972/new/
https://reviews.llvm.org/D133972
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