[PATCH] D134177: Add MC support of RISCV Zcd Extension

[Xinlong Wu via Phabricator via llvm-commits]

VincentWu created this revision.
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This patch add the instructions of Zcd extension.

Zcd is a subset of C Ext which include the double-precision floating-point instructions (c.fld, c.fldsp, c.fsd, c.fsdsp).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D134177

Files:
  clang/test/Preprocessor/riscv-target-features.c
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoC.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/MC/RISCV/rv32dc-valid.s
  llvm/test/MC/RISCV/rv64dc-valid.s

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