[PATCH] D134025: [AMDGPU] Fix isSGPRReg for special registers

[Carl Ritson via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG930315f6aa58: [AMDGPU] Fix isSGPRReg for special registers (authored by critson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134025/new/

https://reviews.llvm.org/D134025

Files:
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp


Index: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -2696,7 +2696,7 @@
     RC = MRI.getRegClass(Reg);
   else
     RC = getPhysRegClass(Reg);
-  return isSGPRClass(RC);
+  return RC ? isSGPRClass(RC) : false;
 }
 
 const TargetRegisterClass *


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