[PATCH] D130579: AMDGPU: Use tablegen patterns for buffer global and flat atomic fadd

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic planned changes to this revision.
Petar.Avramovic added a comment.

There are some conflicts with https://reviews.llvm.org/D130729, looks like an error to me.
Intrinsic patterns don't check address space (they will take any pointer)

  define amdgpu_ps float @flat_atomic_fadd_f32_rtn_intrinsic(float addrspace(1)* %ptr, float %data) {
    %ret = call float @llvm.amdgcn.flat.atomic.fadd(float addrspace(1)* %ptr, float %data)
    ret float %ret
  }
  
  declare float @llvm.amdgcn.flat.atomic.fadd(float addrspace(1)*, float)
  
  
  define amdgpu_ps float @global_atomic_fadd_f32_rtn_intrinsic(float* %ptr, float %data) {
    %ret = call float @llvm.amdgcn.global.atomic.fadd(float* %ptr, float %data)
    ret float %ret
  }
  
  declare float @llvm.amdgcn.global.atomic.fadd(float*, float)

tests like this will select %ptr ignoring it is from wrong address space. I would expect tests like this to fail to select.
Comments and behavior from D130729 <https://reviews.llvm.org/D130729> are based on translation of intrinsic to atomic rmw which are selected based on address space of  %ptr (removed in this patch, intrinsics have separate patterns).

Planed fix:
intrinsic patterns should check address space, failing to select when pointer argument has wrong address space (I assume this is possible to do in tablegen).
D130729 <https://reviews.llvm.org/D130729> will also change intrinsic id, when it changes pointer.

Any comments?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130579/new/

https://reviews.llvm.org/D130579