[PATCH] D131246: [AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.

Alexander via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 16 06:02:15 PDT 2022


alex-t updated this revision to Diff 460713.
alex-t edited the summary of this revision.
alex-t added a comment.

accidental change removed


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131246/new/

https://reviews.llvm.org/D131246

Files:
  llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.h
  llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
  llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
  llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll

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