[PATCH] D132477: Improve cost model for some 128-bit vector operations that use SVE

[Hassnaa Hamdi via Phabricator via llvm-commits]

hassnaa-arm added inline comments.


================
Comment at: llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll:70
+; expected cost: 4
+; CHECK: cost of [[#mul(div(16-1, VBITS)+1, 2)]] for instruction:  %sdiv16.i8   = sdiv <2 x i8> undef, undef
+  %sdiv16.i8   = sdiv <2 x i8> undef, undef
----------------
sdesmalen wrote:
> nit: 16-1 => 15 ?
yes,
I'm using 16-1, 64-1,... for clarification.
because firstly when I looked at a similar file that had 15, 63, I didn't understand what those numbers are.



Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132477/new/

https://reviews.llvm.org/D132477